ADP3120 데이터 시트보기 (PDF) - Analog Devices
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ADP3120 Datasheet PDF : 16 Pages
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ADP3120
SPECIFICATIONS1
VCC = 12 V, BST = 4 V to 26 V, TA = 0°C to 85°C, unless otherwise noted.
Table 1.
Parameter
PWM INPUT
Input Voltage High
Input Voltage Low
Input Current
Hysteresis
Symbol Conditions
OD INPUT
Input Voltage High
Input Voltage Low
Input Current
Hysteresis
Propagation Delay Times2
tpdhlOD
See Figure 4
tpdhlOD
See Figure 4
HIGH-SIDE DRIVER
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Output Resistance, Unbiased
Transition Times
Propagation Delay Times2
SW Pull-Down Resistance
LOW-SIDE DRIVER
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Output Resistance, Unbiased
Transition Times
Propagation Delay Times2
Timeout Delay
SUPPLY
Supply Voltage Range
Supply Current
UVLO Voltage
Hysteresis
trDRVH
tfDRVH
tpdhDRVH
tpdlDRVH
BST − SW = 12 V
BST – SW = 12 V
BST – SW = 0 V
BST – SW = 12 V, CLOAD = 3 nF, see Figure 5
BST – SW = 12 V, CLOAD = 3 nF, see Figure 5
BST – SW = 12 V, CLOAD = 3 nF,
25°C ≤ TA ≤ 85°C, see Figure 5
BST – SW = 12 V, CLOAD = 3 nF, see Figure 5
SW to PGND
trDRVL
tfDRVL
tpdhDRVL
tpdlDRVL
VCC
ISYS
VCC = PGND
CLOAD = 3 nF, Figure 5
CLOAD = 3 nF, Figure 5
CLOAD = 3 nF, Figure 5
CLOAD = 3 nF, Figure 5
SW = 5 V
SW = PGND
BST = 12 V, IN = 0 V
VCC rising
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
2 For propagation delays, tpdh refers to the specified signal going high, and tpdl refers to it going low.
Min Typ Max Unit
2.0
V
0.8 V
−1
+1 μA
90 250
mV
2.0
V
0.8 V
−1
+1 μA
90 250
mV
20 35 ns
40 55 ns
2.2 3.5 Ω
1.0 2.5 Ω
10
kΩ
25 40 ns
20 30 ns
32 45 70 ns
25 35 ns
10
kΩ
2.0 3.2 Ω
1.0 2.5 Ω
10
kΩ
20 35 ns
16 30 ns
12 35 ns
30 45 ns
110 190
ns
95 150
ns
4.15
13.2 V
2
5
mA
1.5
3.0 V
350
mV
Rev. 0 | Page 3 of 16
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