ADP3120A 데이터 시트보기 (PDF) - Analog Devices
부품명
상세내역
제조사
ADP3120A Datasheet PDF : 16 Pages
| |||
ADP3120A
APPLICATION INFORMATION
SUPPLY CAPACITOR SELECTION
For the supply input (VCC) of the ADP3120A, a local bypass
capacitor is recommended to reduce the noise and to supply
some of the peak currents that are drawn. Use a 4.7 μF, low ESR
capacitor. Multilayer ceramic chip (MLCC) capacitors provide
the best combination of low ESR and small size. Keep the
ceramic capacitor as close as possible to the ADP3120A.
BOOTSTRAP CIRCUIT
The bootstrap circuit uses a charge storage capacitor (CBST)
and a diode, as shown in Figure 1. These components can be
selected after the high-side MOSFET is chosen. The bootstrap
capacitor must have a voltage rating that can handle twice the
maximum supply voltage. A minimum 50 V rating is
recommended. The capacitor values are determined by
C BST1
+
C
BST2
=
10
×
QGATE
VGATE
(1)
C BST1
= VGATE
(2)
CBST1 + CBST2 VCC − VD
where:
QGATE is the total gate charge of the high-side MOSFET at VGATE.
VGATE is the desired gate drive voltage (usually in the range of
5 V to 10 V, 7 V being typical).
VD is the voltage drop across D1.
Rearranging Equation 1 and Equation 2 to solve for CBST1 yields
C
BST1
=
10
×
QGATE
VCC − VD
CBST2 can then be found by rearranging Equation 1
C BST2
= 10 ×
QGATE
VGATE
− CBST1
For example, an NTD60N02 has a total gate charge of about
12 nC at VGATE = 7 V. Using VCC = 12 V and VD = 1 V, then
CBST1 = 12 nF and CBST2 = 6.8 nF. Good quality ceramic capacitors
should be used.
RBST is used to limit slew rate and minimize ringing at the switch
node. It also provides peak current limiting through D1. An
RBST value of 1.5 Ω to 2.2 Ω is a good choice. The resistor needs
to handle at least 250 mW due to the peak currents that flow
through it.
A small signal diode can be used for the bootstrap diode due
to the ample gate drive voltage supplied by VCC. The bootstrap
diode must have a minimum 15 V rating to withstand the
maximum supply voltage. The average forward current can
be estimated by
I F(AVG) = QGATE × f MAX
(3)
where fMAX is the maximum switching frequency of the
controller.
The peak surge current rating should be calculated by
I F(PEAK )
=
VCC − VD
RBST
(4)
MOSFET SELECTION
When interfacing the ADP3120A to external MOSFETs, the
designer should consider ways to make a robust design that
minimizes stresses on both the driver and the MOSFETs. These
stresses include exceeding the short time duration voltage
ratings on the driver pins as well as the external MOSFET.
It is also highly recommended to use the Boot-Snap circuit to
improve the interaction of the driver with the characteristics of
the MOSFETs. If a simple bootstrap arrangement is used, make
sure to include a proper snubber network on the SW node.
HIGH-SIDE (CONTROL) MOSFETS
A high-side, high speed MOSFET is usually selected to
minimize switching losses (see the ADP3186 or ADP3188
data sheet for Flex-Mode controller details). This typically
implies a low gate resistance and low input capacitance/charge
device. Yet, a significant source lead inductance can also exist
that depends mainly on the MOSFET package; it is best to
contact the MOSFET vendor for this information.
The ADP3120A DRVH output impedance and the input
resistance of the MOSFETs determine the rate of charge delivery
to the internal capacitance of the gate. This determines the
speed at which the MOSFETs turn on and off. However, because
of potentially large currents flowing in the MOSFETs at the on
and off times (this current is usually larger at turn-off due to
ramping up of the output current in the output inductor), the
source lead inductance generates a significant voltage when the
high-side MOSFETs switch off. This creates a significant drain-
source voltage spike across the internal die of the MOSFETs and
can lead to a catastrophic avalanche. The mechanisms involved
in this avalanche condition are referenced in literature from the
MOSFET suppliers.
Rev. 0 | Page 10 of 16
Share Link: 