ADP3413JR 데이터 시트보기 (PDF) - Analog Devices
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ADP3413JR Datasheet PDF : 8 Pages
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ADP3413–SPECIFICATIONS1
(TA = 0؇C to 70؇C, VCC = 7 V, BST = 4 V to 26 V, OD > 2 V, unless otherwise noted.)
Parameter
Symbol
Conditions
Min Typ Max Unit
SUPPLY
Supply Voltage Range
Quiescent Current
OD INPUT
Input Voltage High2
Input Voltage Low2
Propagation Delay Time
PWM INPUT
Input Voltage High2
Input Voltage Low2
VCC
ICCQ
tpdlOD
tpdhOD
4.15
1
7.5
V
2
mA
2.0
V
0.8
V
15
30
ns
15
30
ns
2.3
V
0.8
V
HIGH-SIDE DRIVER
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times3 (See Figure 2)
Propagation Delay3, 4 (See Figure 2)
trDRVH
tfDRVH
tpdhDRVH
tpdlDRVH
VBST – VSW = 5 V
VBST – VSW = 7 V
VBST – VSW = 5 V
VBST – VSW = 7 V
VBST – VSW = 7 V, CLOAD = 3 nF
VBST – VSW = 7 V, CLOAD = 3 nF
VBST – VSW = 7 V
VBST – VSW = 7 V
LOW-SIDE DRIVER
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times3 (See Figure 2)
Propagation Delay3, 4 (See Figure 2)
trDRVL
tfDRVL
tpdhDRVL
tpdlDRVL
VCC = 5 V
VCC = 7 V
VCC = 5 V
VCC = 7 V
VCC = 7 V, CLOAD = 3 nF
VCC = 7 V, CLOAD = 3 nF
VCC = 7 V
VCC = 7 V
NOTES
1All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
2Logic inputs meet typical CMOS I/O conditions for source/sink current (~1 µA).
3AC specifications are guaranteed by characterization, but not production tested.
4For propagation delays, “tpdh” refers to the specified signal going high; “tpdl” refers to it going low.
Specifications subject to change without notice.
3.0 5.0
Ω
2.0 3.5
Ω
1.25 2.5
Ω
1.0 2.5
Ω
36
47
ns
20
30
ns
65
86
ns
22
32
ns
3.0 5.0
Ω
2.0 3.5
Ω
1.5 3.0
Ω
1.0 2.5
Ω
27
35
ns
19
26
ns
30
35
ns
17
25
ns
–2–
REV. 0
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