ADSP-BF535PBB-200 데이터 시트보기 (PDF) - Analog Devices

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ADSP-BF535PBB-200

Blackfin® Embedded Processor

Analog Devices 

DMA controller and interrupt input to minimize processor

polling overhead and to enable asynchronous requests for CPU

attention only when transfer management is required.

The USB device requires an external 48 MHz oscillator. The

value of SCLK must always exceed 48 MHz for proper USB

operation.

Real-Time Clock

The ADSP-BF535 Blackfin processor Real-Time Clock (RTC)

provides a robust set of digital watch features, including current

time, stopwatch, and alarm. The RTC is clocked by a 32.768 kHz

crystal external to the ADSP-BF535 Blackfin processor. The

RTC peripheral has dedicated power supply pins, so that it can

remain powered up and clocked, even when the rest of the

processor is in a low power state. The RTC provides several

programmable interrupt options, including interrupt per second,

minute, or day clock ticks, interrupt on programmable stopwatch

countdown, or interrupt at a programmed alarm time.

The 32.768 kHz input clock frequency is divided down to a 1 Hz

signal by a prescaler. The counter function of the timer consists

of four counters: a 6-bit second counter, a 6-bit minute counter,

a 5-bit hours counter, and an 8-bit day counter.

When enabled, the alarm function generates an interrupt when

the output of the timer matches the programmed value in the

alarm control register. There are two alarms: one is for a time of

day, the second is for a day and time of that day.

The stopwatch function counts down from a programmed value,

with one minute resolution. When the stopwatch is enabled and

the counter underflows, an interrupt is generated.

Like the other peripherals, the RTC can wake up the ADSP-

BF535 Blackfin processor from a low power state upon

generation of any interrupt.

Connect RTC pins XTALI and XTALO with external compo-

nents, as shown in Figure 3.

XTAL1

X1

C1

XTAL0

C2

SUGGESTED COMPONENTS:

ECLIPTEK EC38J (THROUGH-HOLE PACKAGE)

EPSON MC405 12pF LOAD (SURFACE-MOUNT PACKAGE)

C1 = 22pF

C2 = 22pF

NOTE: C1 AND C2 ARE SPECIFIC TO CRYSTAL SPECIFIED FOR X1.

CONTACT CRYSTAL MANUFACTURER FOR DETAILS. C1 AND C2

SPECIFICATIONS ASSUME BOARD TRACE CAPACITANCE OF 3pF.

Figure 3. External Components for RTC

Watchdog Timer

The ADSP-BF535 Blackfin processor includes a 32-bit timer,

which can be used to implement a software watchdog function.

A software watchdog can improve system availability by forcing

ADSP-BF535

the processor to a known state, via generation of a hardware reset,

non-maskable interrupt (NMI), or general-purpose interrupt, if

the timer expires before being reset by software. The programmer

initializes the count value of the timer, enables the appropriate

interrupt, then enables the timer. Thereafter, the software must

reload the counter before it counts to zero from the programmed

value. This protects the system from remaining in an unknown

state where software, which would normally reset the timer, has

stopped running because of external noise conditions or a

software error.

After a reset, software can determine if the watchdog was the

source of the hardware reset by interrogating a status bit in the

timer control register, which is set only upon a watchdog

generated reset.

The timer is clocked by the system clock (SCLK), at a maximum

frequency of fSCLK.

Timers

There are four programmable timer units in the ADSP-BF535

Blackfin processor. Three general-purpose timers have an

external pin that can be configured either as a Pulse-Width

Modulator (PWM) or timer output, as an input to clock the

timer, or for measuring pulse widths of external events. Each of

the three general-purpose timer units can be independently pro-

grammed as a PWM, internally or externally clocked timer, or

pulse width counter.

The general-purpose timer units can be used in conjunction with

the UARTs to measure the width of the pulses in the data stream

to provide an autobaud detect function for a serial channel.

The general-purpose timers can generate interrupts to the

processor core providing periodic events for synchronization,

either to the processor clock or to a count of external signals.

In addition to the three general-purpose programmable timers,

a fourth timer is also provided. This extra timer is clocked by the

internal processor clock (CCLK) and is typically used as a system

tick clock for the generation of operating system periodic

interrupts.

Serial Ports (Sports)

The ADSP-BF535 Blackfin processor incorporates two complete

synchronous serial ports (SPORT0 and SPORT1) for serial and

multiprocessor communications. The SPORTs support these

features:

• Bidirectional operation—Each SPORT has independent

transmit and receive pins.

• Buffered (8-deep) transmit and receive ports—Each port

has a data register for transferring data-words to and from

other processor components and shift registers for shifting

data in and out of the data registers.

• Clocking—Each transmit and receive port can either use

an external serial clock or generate its own, in frequencies

ranging from (fSCLK/131070) Hz to (fSCLK/2) Hz.

• Word length—Each SPORT supports serial data-words

from 3 to 16 bits in length transferred in a format of most

significant bit first or least significant bit first.

REV. A

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