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AGM1216A 데이터 시트보기 (PDF) - AZ Displays

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AGM1216A
AZ-Displays
AZ Displays AZ-Displays
AGM1216A Datasheet PDF : 12 Pages
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AZ DISPLAYS, INC.
5.0 Interface Pin Function
AGM1216A
NO SYMBOL
FUNCTION
TRST = H (Display off)
Making /DISP low sets the D1 flag to 0 and the D0 flag to 0 (D1 =
1
DISP
D0 = 0) in the driver output control register (08h) and turns OFF the
display. To light the display after it has been turned OFF by this pin,
make /DISP high and set the D1 flag to 1 and the D0 flag to 1
(D1 = 1, D0 = 1).
2
VSS
Ground pin, connected to 0 V
3
VCC
This pin is the power supply pin for EEPROM. connects to +2.7 V to +5.5 V
4
VDD
Power supply pin, connects to +2.4 V to +3.3 V
The pin is chip select signal pin. When /CS1 = L, the
5
/CS1
chip is active, and data/commands can be input or output and I/O manipulated.
This pin is usually connected to the least significant bit of a standard CPU
address bus to identify whether data is an index register or data/command.
6
RS
RS = H: Indicates that D0 to D7 or D0 to D15 are data/command.
RS = L: Indicates that D0 to D7 or D0 to D15 are an index register.
When i80 system parallel data transfer is selected (/WR), write is enabled
by this signal. Data is written at the rising edge of this signal. When M68
7
/WR
system parallel data transfer is selected, this pin determines the
data transfer direction, as follows:
0: Write 1: Read
When i80 system parallel data transfer is selected (/RD), read is enabled
by this signal. When this pin is L, data is output to the data bus. When
8
/RD
M68 system parallel data transfer is selected, this pin inputs an enable
signal that triggers data write or read.
L: Serial
9
PSX
H: Parallel
L: I80 system CPU mode
10
S80X
H: M68 system CPU mode
L: 16bit data bus
11
BMOD
H: 8bit data bus
Page 8 of 12

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