AK7750VT 데이터 시트보기 (PDF) - Asahi Kasei Microdevices

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AK7750VT

Audio DSP with Built-in Hands-Free Phone Features

Asahi Kasei Microdevices 

[ASAHI KASEI]

(3) DSP Block Diagram

[AK7750]

CP0,CP1

DP0,DP1

CRAM

1024w × 16bit

DRAM

256w × 24bit

CBUS(16bit)

DBUS(24bit)

DP0,DP1

DLRAM

OFRAM

1kw × 24bit or 4kw × 16bit

1kw × 24bit & 2kw × 16bit

48w × 12bit

CMP(comp/decomp)

MPX16

MPX24

Micon I/F

Control

Serial I/F

X

Y

Multiply

16bit × 24bit → 40bit

40bit

24bit

34bit

MUL DBUS

SHIFT

34bit

A

B

ALU

34bit

Overflow Margin: 4bit

DR0∼ 3

24bit

Over Flow Data

Generator

DEC

PRAM

768w × 32bit

PC

Stack : 1level

TMP 8 × 24bit

PTMP(LIFO) 6 × 24bit

2 × 24/20/16bit

2 × 24/20/16bit

2 × 24/20/16bit

2 × 24/20/16bit

2 × 24/20/16bit

SDIN5A or from ADC

SDIN4

SDIN3H or from ARM

SDIN2

SDIN1

2 × 24bit

2 × 24bit

2 × 24bit

SDOUT4A or to DAC

SDOUT3

SDOUT2

or to ARM

2 × 24bit

SDOUT1

Division

24÷2→24or16

Peak Detector

[MS0296-E-00]

6

2005/03

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