ALC202 데이터 시트보기 (PDF) - Unspecified
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ALC202 Datasheet PDF : 29 Pages
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Avance Logic, Inc.
ALC202
MX26
Bit
15
14
13
12
11
10
9
8
7:4
3
2
1
0
Powerdown Control/Status
Default: 000FH
Type
Function
R/W PR7 External Amplifier Power Down (EAPD) 0: normal 1: Power down
R/W PR6 0: Normal 1: Power down Headphone Out (HP-OUT)
R/W PR5 0: Normal 1: Disable internal clock
R/W PR4 0: Normal 1: Power down AC-Link
R/W PR3 0: Normal 1: Power down Mixer (Vref off)
R/W PR2 0: Normal 1: Power down Mixer (Vref still on)
R/W PR1 0: Normal 1: Power down PCM DAC
R/W PR0 0: Normal 1: Power down PCM ADC and input MUX
Reserved, Read as 0
R Vref status 1: Vref is up to normal level 0: Not yet
R Analog Mixer status 1: Ready 0: Not yet
R DAC status 1: Ready 0: Not yet
R ADC status 1: Ready 0: Not yet
MX28
Extended Audio ID
Default: 060Fh
Bit
Type
Function
15
R ID1 Ê
14
R ID0
13:12
Reserved, Read as 0
11:10
R REV[1:0]=01 to indicates ALC202 is AC’97 rev2.2 compliant.
9
R AMAP read as 1 (DAC mapping based on ID)
8:6
Reserved, Read as 0
5:4
R/W DSA[1:0], DAC Slot AssignmentË (Default value depends on ID[1:0])
DSA[1:0] control DAC slot assignment described in AC’97 rev2.2.
3
Reserved, Read as 0
2
R SPDIF read as 1 (S/PDIF is supported)
1
R DRA read as 1
0
R VRA read as 1 (Variable Rate Audio is supported)
ÊID1 is latched inversely from pin 46 when system reset. ID0 is latched inversely from pin 45
when system reset.
ËALC202 maps DAC slot according to the following table: (default maps to AC’97 spec.
rev2.2)
DSA[1:0] Left DAC slot # Right DAC slot #
Comment
0,0
3
4
Default when ID[1:0]=00
0,1
7
8
Default when ID[1:0]=01,10
1,0
6
9
Default when ID[1:0]=11
1,1
10
11
MX2A
Bit
15:11
10
9:6
5:4
Extended Audio Status and control register
Default: 0000H
Type
Function
Reserved
R SPCV (S/PDIF Configuration Valid)
0: current S/PDIF configuration {SPSA,SPSR,DAC/slot rate} is not valid.
1: current S/PDIF configuration {SPSA,SPSR,DAC/slot rate} is valid.
Reserved
R/W SPSA[1:0] (S/PDIF Slot Assignment)
00: S/PDIF source data assigned to AC-LINK slot3/4.
01: S/PDIF source data assigned to AC-LINK slot7/8.
10: S/PDIF source data assigned to AC-LINK slot6/9.
- 12 -
Rev0.62
http://www.realtek.com.tw
Preliminary
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