PDM41258SA10SO 데이터 시트보기 (PDF) - Paradigm Technology

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PDM41258SA10SO

256K Static RAM 64K x 4-Bit

Paradigm Technology 

Pin Configuration

SOJ

A0 1

A1 2

A2 3

A3 4

A4 5

A5 6

A6 7

A7 8

A8 9

A9 10

CE 11

Vss 12

24 Vcc

23 A15

22 A14

21 A13

20 A12

19 A11

18 A10

17 I/O3

16 I/O2

15 I/O1

14 I/O0

13 WE

Pin Description

Name

A15-A0

I/O3-I/O0

WE

CE

VCC

VSS

Description

Address Inputs

Data Inputs and Outputs

Write Enable Input

Chip Enable Input

Power (+5V)

Ground

PDM41258

Truth Table

WE

CE

I/O

MODE

X

H

Hi-Z

Standby

H

L

DOUT

L

L

DIN

Read

Write

NOTE:1.H = VIH, L = VIL, X = DON’T CARE

Absolute Maximum Ratings (1)

Symbol Rating

TTERM

TBIAS

TSTG

PT

IOUT

Tj

Terminal Voltage with Respect to VSS

Temperature Under Bias

Storage Temperature

Power Dissipation

DC Output Current

Maximum Junction Temperature (2)

Com’l.

–0.5 to +7.0

–55 to +125

–55 to +125

1.0

50

125

Ind.

Unit

–0.5 to +7.0

°C

–65 to +135

°C

–65 to +150

°C

1.0

W

50

mA

145

°C

NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in the

operational sections of this specification is not implied. Exposure to absolute maxi-

mum rating conditions for extended periods may affect reliability

.2. Appropriate thermal calculations should be performed in all cases and specifically for

those where the chosen package has a large thermal resistance (e.g., TSOP). The

calculation should be of the form: Tj = Ta + P * θja, where Ta is the ambient tempera-

ture, P is average operating power and θja the thermal resistance of the package. For

this product, use the following θja value:

SOJ: 83o C/W

2

Rev. 2.2 - 4/27/98

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