AM29F016-150FC 데이터 시트보기 (PDF) - Advanced Micro Devices
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AM29F016-150FC
Advanced Micro Devices
AM29F016-150FC Datasheet PDF : 36 Pages
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Table 1. Am29F016 User Bus Operations
Operation
CE OE WE A0 A1 A6 A9 DQ0–DQ7
RESET
Autoselect, AMD Manuf. Code (1)
Autoselect Device Code (1)
Read
Standby
L
L
H
L
L
L
VID
Code
H
L
L
H
H
L
L
VID
Code
H
L
L
X A0 A1 A6 A9
DOUT
H
H
X
X
X
X
X
X
HIGH Z
H
Output Disable
L
H
H
X
X
X
X
HIGH Z
H
Write
L
H
L A0 A1 A6 A9
DIN
H
Enable Sector Group Protect (2)
L
VID
L
X
X
X
VID
X
H
Verify Sector Group Protect (2)
L
L
H
L
H
L
VID
Code
H
Temporary Sector Group Unprotect
X
X
X
X
X
X
X
X
VID
Hardware Reset/Standby
X
X
X
X
X
X
X
HIGH Z
L
Legend:
L = logic 0, H = logic 1, X = Don’t Care. See DC Characteristics for voltage levels.
Notes:
1. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 5.
2. Refer to the section on Sector Group Protection.
Read Mode
The Am29F016 has two control functions which must
be satisfied in order to obtain data at the outputs. CE is
the power control and should be used for device selec-
tion. OE is the output control and should be used to
gate data to the output pins if the device is selected.
Address access time (tACC) is equal to the delay from
stable addresses to valid output data. The chip
enable access time (tCE) is the delay from stable
addresses and stable CE to valid data at the output
pins. The output enable access time is the delay from
the falling edge of OE to valid data at the output pins
(assuming the addresses have been stable for at
least tACC–tOE time).
Standby Mode
There are two ways to implement the standby mode on
the Am29F016 device, one using both the CE and
RESET pins; the other via the RESET pin only.
When using both pins, a CMOS standby mode is
achieved with CE and RESET inputs both held at VCC
± 0.3 V. Under this condition the current is typically
reduced to less than 1 µA. A TTL standby mode is
achieved with CE and RESET pins held at VIH. Under
this condition the current is typically reduced to 200 µA.
The device can be read with standard access time (tCE)
from either of these standby modes.
When using the RESET pin only, a CMOS standby
mode is achieved with RESET input held at VSS ± 0.3 V
(CE = don’t care). Under this condition the current is typ-
ically reduced to less than 1 µA. A TTL standby mode is
achieved with RESET pin held at VIL (CE = don’t care).
Under this condition the current is typically reduced to
less than 200 µA. Once the RESET pin is taken high,
the device requires 50 ns of wake up time before out-
puts are valid for read access.
In the standby mode the outputs are in the high imped-
ance state, independent of the OE input.
Output Disable
With the OE input at a logic high level (VIH), output from
the device is disabled. This will cause the output pins to
be in a high impedance state.
8
Am29F016
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