AM79C02 데이터 시트보기 (PDF) - Advanced Micro Devices
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AM79C02 Datasheet PDF : 48 Pages
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ELECTRICAL CHARACTERISTICS over operating range unless otherwise noted
Typical values are for TA = 25°C and nominal supply voltages. Minimum and maximum specifications are over the
temperature and supply voltage ranges shown in Operating Ranges.
Symbol
Parameter Descriptions
Min
Typ
Max
Unit Note
VIL Input Low voltage
VIH Input High voltage
IIL
Input leakage current
VOL Output Low voltage
C1–C5 (IOL = 6 mA)
C1–C5 (IOL = 15 mA)
TSCA, TSCB (IOL = 14 mA)
Other digital outputs (IOL = 2 mA)
VOH Output High voltage
C1–C5 (IOH = 4 mA)
C1–C5 (IOH = 10 mA)
Other digital outputs (IOH = 400 µA)
IOL Output leakage current (HI-Z State)
VIR Analog input voltage range
(AX = 0 dB)
(AX = 6.02 dB)
–0.5
2.0
VCC – 0.4
VCC – 1.0
2.4
0.8
V
VCC
±10
µA
0.4
2
1.0
2
0.4
—
0.4
V
—
2
2
—
±10
µA
±3.12
±1.56
V
VIOS
IIL (VIL)
ZIN
ZOUT
IOUT
VOR
Offset voltage allowed on VIN
Input leakage current on VIN
Analog input impedance 300 Hz to 3400 Hz
VOUT output impedance
VOUT output current (f < 3400 Hz)
VOUT voltage range
(AR = 0 dB)
(AR = 6.02 dB)
±160
mV
±10
µA
5
MΩ
1
10
Ω
±6.3
mA
1
±3.12
±1.56
V
VOOS
VOOSA
LINAISN
PD
PD
VOUT offset voltage (AISN off)
VOUT offset voltage (AISN on)
Linearity of AISN circuity (input = 0 dBm0)
Power dissipation
Both channels active
(MCLK, PCLK = 2.048 MHz) 1 channel active
Both channels inactive
Power dissipation
Both channels active
(MCLK, PCLK > 2.048 MHz) 1 channel active
Both channels inactive
±40
mV
±80
3
±¼
LSB
180
240
—
120
160
—
10
19
4
mW
190
270
—
130
175
—
10
19
4
ICC Total +5 V current
Both channels active
24.0
1 channel active
18.0
Both channels inactive
2.5
IEE Total –5 V current
Both channels active
10.0
1 channel active
5.0
Both channels inactive
0.05
—
—
4
mA
—
—
4
CI
Input capacitance (Digital)
CO Output capacitance (Digital)
15
pF
15
PSRR Power supply rejection ratio (1.02 kHz, 100 mVrms,
40
dB
either supply or path, GX = GR = 0 dB)
Notes:
1. When the DSLAC device is in the Inactive mode, the analog output presents a 0 V output level through a ~3 kΩ resistor.
2. The C1–C5 outputs are resistive for less than a 1 V drop. Total current must not exceed absolute maximum ratings.
3. If there is an external DC path from VOUT to VIN with a gain of GDC and the AISN has a gain of hAISN, then the output offset
is multiplied by 1/[1 – (hAISN • GDC)].
4. Power Dissipation in the Inactive mode is measured with all digital inputs at VIH = VCC and VIL = VSS and with no load
connected to VOUT1 or VOUT2.
10
Am79C02/03/031(A) Data Sheet
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