AM79C02 데이터 시트보기 (PDF) - Advanced Micro Devices

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AM79C02

Dual Subscriber Line Audio Processing Circuit (DSLAC™) Devices

Advanced Micro Devices 

Power supply for the Am79C02:

AGND1

AGND2

DGND1

DGND2

PGND

Analog Ground (Channel 1)

Analog Ground (Channel 2)

Digital Ground (Channel 1)

Digital Ground (Channel 2)

PCM I/O Ground

VCCA1

VCCA2

VCCD1

+5 V Analog Power Supply (Channel 1)

+5 V Analog Power Supply (Channel 2)

+5 V Digital Power Supply

Internally connected to substrate

VCCD2

+5 V Digital Power Supply

Internally connected to substrate

VCCP

+5 V PCM I/O Power Supply

Internally connected to substrate

VEE1

–5 V Power Supply (Channel 1)

VEE2

–5 V Power Supply (Channel 2)

Power supply for the Am79C03 and Am79C031:

AGND Analog Ground

DGND Digital Ground

VCCA

+5 V Analog Power Supply

VCCD +5 V Digital Power Supply

Internally connected to substrate

VEE1

–5 V Power Supply (Channel 1)

VEE2

–5 V Power Supply (Channel 2)

The many separate power supply inputs are intended to

provide for good power supply decoupling techniques.

Note that all of the +5 V inputs should be connected to

the same source, all of the ground inputs should be con-

nected to the same source, and both of the –5 V inputs

should be connected to the same source.

FUNCTIONAL DESCRIPTION

The DSLAC device performs the codec/filter functions

associated with the four-wire section of the subscriber

line circuitry in a digital switch. These functions involve

converting an analog voice signal into digital PCM sam-

ples and converting digital PCM samples back into an

analog signal. During conversion, digital filters are used

to bandlimit the voice signals.

Independent channels allow the DSLAC device to func-

tion as two SLAC devices. All of the digital filtering is

performed in digital signal processors operating from

either a 2.048 MHz or 4.096 MHz external clock. The

A/D, D/A, and signal processing is separate for each

channel and each channel has its own Chip Select (CS1

and CS2) to allow separate programming.

The user-programmable filters set the receive and

transmit gain, perform the transhybrid balancing func-

tion, permit adjustment of the two-wire termination im-

pedance, and provide equalization of the receive and

transmit paths. All programmable digital filter coeffi-

cients can be calculated using the AmSLAC2 software.

The PCM codes can be either 8-bit companded A-law

or µ-law. The PCM data is read and written to the

PCM highway in user-programmable time slots at

rates of 128 kHz to 8.192 MHz. The output hold time

and the transmit clock edge can be selected for com-

patibility with other devices that can be connected to

the PCM highway.

Four configurations of the DSLAC device are offered

with the PCM interface described above. The

Am79C02(A), the original version of the DSLAC device,

is available in the 44-pin PLCC package. The

Am79C03(A) and Am79C031(A) are reduced pin count

versions obtained by consolidating a number of ground

and power supply buses on chip, and eliminating the

hardware reset function. The Am79C03(A) is available

in 32-pin PLCC packages. The Am79C031(A) is avail-

able in a 32-pin PLCC package. The “A” version of both

devices (e.g., Am79C02A) offers the adaptive transhy-

brid balance feature described in the Adaptive B Filter

overview.

8

Am79C02/03/031(A) Data Sheet

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