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IS27LV020-12W 데이터 시트보기 (PDF) - Integrated Silicon Solution

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IS27LV020-12W
ISSI
Integrated Silicon Solution ISSI
IS27LV020-12W Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
IS27LV020
ISSI®
Output OR-Tieing
To accommodate multiple memory connections, a two-
line control function is provided to allow for:
1. Low memory power dissipation, and
2. Assurance that output bus contention will not
occur.
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and con-
nected to the READ line from the system control bus. This
assures that all deselected memory devices are in their
low-power standby mode and that the output pins are only
active when data is desired from a particular memory
device.
System Applications
During the switch between active and standby conditions,
transient current peaks are produced on the rising and
falling edges of Chip Enable. The magnitude of these
transient current peaks is dependent on the output capaci-
tance loading of the device at a minimum, a 0.1 µF ceramic
capacitor (high-frequency, low inherent inductance) should
be used on each device between VCC and GND to mini-
mize transient effects. In addition, to overcome the voltage
drop caused by the inductive effects of the printed circuit
board traces on EPROM arrays, a 4.7 µF bulk electrolytic
capacitor should be used between VCC and GND for each
eight devices. The location of the capacitor should be
close to where the power supply is connected to the array.
TRUTH TABLE(1,2)
Mode
CE
OE PGM A0
A9
VPP
Read
VIL
VIL
X
X
X
VCC
Output Disable
VIL
VIH
X
X
X
VCC
Standby
VIH
X
X
X
X
VCC
Program
VIL
VIH
VIL
X
X
VPP
Program Verify
VIL
VIL
VIH
X
X
VPP
Program Inhibit
VIH
X
X
X
X
VPP
Auto Select(3,5) Manufacturer Code VIL
VIL
X
VIL
VH
VCC
Device Code VIL
VIL
X
VIH
VH
VCC
Notes:
1. VH = 12.0V ± 0.5V.
2. X = Either VIH or VIL.
3. A1-A8 = A10-A17 = VIL.
4. See DC Programming Characteristics for VPP voltage during programming.
5. The IS27LV020 can use the same write algorithm during program as other IS27C020 or IS27020 devices.
Outputs
DOUT
Hi-Z
Hi-Z
DIN
DOUT
Hi-Z
D5H
0EH
LOGIC SYMBOL
18
A0-A17
8
DQ0-DQ7
CE (E)
PGM (P)
OE (G)
4
Integrated Silicon Solution, Inc.
EP019-0A
12/19/97

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