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APW7093QA 데이터 시트보기 (PDF) - Anpec Electronics

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APW7093QA
Anpec
Anpec Electronics Anpec
APW7093QA Datasheet PDF : 20 Pages
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APW7093
Electrical Characteristics (Cont.)
(VIN=VCC=3.3V, VEXTREF=+1.1V, TA = -45 to +85oC, unless otherwise noted, Typical values are at TA =+25oC.)
Symbol
Parameter
Test Conditions
APW7093
Unit
Min Typ Max
VIL
VIH SHDN Logic Levels
0.8
V
2.0
IOUT(RMS) Maximum Output RMS Current
3.1 ARMS
Note2: The output voltage will have a DC-regulation level lower than the feedback error comparator threshold
by 50% of the ripple.
Note3: Recommended operating frequency, not production tested.
Functional Pin Description
Name
PIN (QFN)
PIN (QSOP)
FUNCTION
N.C
1,5,7,9,11,13,16,19,
25,26,28,30,32
IN
2,4
LX
3,21,22,27,29
SS
6
EXTREF
8
TOFF
10
FB
12
14,17,backside pad,
GND corner tabs
REF
15
GND
17
VCC
18
PGND
20,23,24
SHDN
31
X
No Connection, Not internally connected.
2,4
3,14,16
5
6
7
8
9
10
11
12
13,15
1
Supply Voltage Input for the internal PMOS Power Switch.
Not internally connected. Externally connect all pins for
proper operation.
Inductor Connection. Connection for the drains of the PMOS
power switch and NMOS synchronous-rectifier switch.
Connect the inductor from this node to the output filter
capacitor and load. Not internally connected. Externally
connect all pins for proper operation.
Soft-Start Connect a capacitor from SS to GND to limit inrush
current during startup.
External Reference Input Feedback input regulates to
VEXTREF. The PWM controller remains off until EXTREF is
greater than REF.
Off-Time Select Input. Sets the PMOS power switch
constant-off-time. Connect a resistor from TOFF to GND to
adjust the PMOS switch off-time.
Feedback Input. Connect directly to output for fixed-voltage
operation or to a resistive-divider for adjustable operating
modes.
Analog Ground. Connect exposed backside pad and corner
tabs to analog GND.
Reference Output. Bypass REF to GND with a 0.1µF
capacitor.
Tie to GND (pin 13 QFN; pin 9 SSOP)
Analog Supply Voltage Input. Supplies internal analog
circuitry. Bypass VCC with a 10and 1µF low-pass filter. See
Figure2.
Power Ground. Internally connected to the internal NMOS
synchronous-rectifier switch.
Shutdown control Input Drive SHDN low to disable the
reference, control circuitry, and internal MOSFETs. Drive
high or connect to VCC for normal operation.
Copyright © ANPEC Electronics Corp.
5
Rev. A.5 - Jun., 2005
www.anpec.com.tw

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