AS1150 데이터 시트보기 (PDF) - austriamicrosystems AG
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AS1150 Datasheet PDF : 15 Pages
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AS1150, AS1151
Data Sheet
7 Pinout
Pin Assignments
Figure 15. Pin Assignments (Top View)
IN1- 1
IN1+ 2
IN2+ 3
IN2- 4
IN3- 5
IN3+ 6
IN4+ 7
IN4- 8
AS1150
AS1151
16 EN
15 OUT1
14 OUT2
13 VCC
12 GND
11 OUT3
10 OUT4
9 ENn
austriamicrosystems
Pin Assignments
Pin Descriptions
Table 4. Pin Descriptions
Pin Number Pin Name
1
IN1-
2
IN1+
3
IN2+
4
IN2-
5
IN3-
6
IN3+
7
IN4+
8
IN4-
9
ENn
10
OUT4
11
OUT3
12
GND
13
VCC
14
OUT2
15
OUT1
16
EN
Description
Inverting Differential Receiver Input
Noninverting Differential Receiver Input
Noninverting Differential Receiver Input
Inverting Differential Receiver Input
Inverting Differential Receiver Input
Noninverting Differential Receiver Input
Noninverting Differential Receiver Input
Inverting Differential Receiver Input
Receiver Enable Input. Internally pulled down to GND.
When EN = high and ENn = low or open, the receiver outputs are active. For other
combinations of EN and ENn, the outputs are disabled and in high impedance.
LVCMOS/LVTTL Receiver Output
LVCMOS/LVTTL Receiver Output
Ground
Power-Supply Input. Bypass VCC to GND with 0.1µF and 0.001µF ceramic
capacitors.
LVCMOS/LVTTL Receiver Output
LVCMOS/LVTTL Receiver Output
Receiver Enable Input. Internally pulled down to GND.
When EN = high and ENn = low or open, the receiver outputs are active. For other
combinations of EN and ENn, the outputs are disabled and in high impedance.
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Revision 1.19
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