AS1543 데이터 시트보기 (PDF) - austriamicrosystems AG
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AS1543 Datasheet PDF : 29 Pages
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AS1543/44
Data Sheet - Electrical Characteristics
Timing Specifications
VDD = 2.7 to 5.25V, VDRIVE ≤ VDD, REFIN = 2.5V; TAMB = -40 to +85°C (unless otherwise specified). Specifications
based on load circuit shown in Figure 3 on page 8.
Table 4.
Symbol Min Typ Max Unit
Description
fSCLK
0.01
20 MHz SCLK frequency
tCP
50
tQUIET
50
ns SCLK periode
ns
Minimum quiet time required between bus relinquish and next
conversion start.
tCSS
10
ns CSN Fall to SCLK Fall Setup
tCSDOE
20 ns CSN Fall to DOUT Enabled.
tCSDOV
40 ns CSN Fall to DOUT Valid.
tCL
0.4 tCP
ns SCLK Pulse Width Low.
tCH
0.4 tCP
ns SCLK Pulse Width High.
tDOH
10
ns SCLK Fall to DOUT Hold.
tDOV
50 ns SCLK Fall to DOUT Valid.
tDOD
15
50 ns SCLK Fall to DOUT Disable.
tDS
20
ns DIN to SCLK Fall Setup.
tDH
5
ns DIN to SCLK Fall Hold.
tCSH
20
ns Sixteenth SCLK Fall to CSN Rise Hold.
tWAKEUP
1
µs Power-up time from auto shutdown mode.
Figure 3. Load Circuit for Digital Output Timing Specifications
200µA
IOL
DOUT
CLOAD
25pF
200µA
IOH
VDD/2
Figure 4. Serial Interface Timing Diagram
CSN
SCLK
tCSS
tCONVERT
B
tCH
1
2
3
4
5
6
12
13
14
15
16
tCSDOV
tCSDOE
DOUT
Tri-State
ADDR3
ADDR2 ADDR1 ADDR0
tDOV
DB11
DB10
tDS
4 ID Bits
tDH
tDOH
DIN
WRITE SEQ ADDR3 ADDR2 ADDR1 ADDR0
DB3
tCL
DB2
DB1
DB0
tDOD
tCSH
tQUIET
Tri-State
SE/FDN DC
DC
DC
DC = Don’t Care
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