AS1916 데이터 시트보기 (PDF) - austriamicrosystems AG

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AS1916

Microprocessor Supervisory Circuits with Manual Reset and Watchdog

austriamicrosystems AG 

AS1916 - AS1918

Datasheet - Detailed Description

8 Detailed Description

The AS1916 - AS1918 supervisory circuits were designed to generate a reset when the monitored supply voltage falls below its factory-trimmed

trip threshold (see VTH on page 4), and to maintain the reset for a minimum timeout period (see tRP on page 4) after the supply has stabilized.

The integrated watchdog timer (see Watchdog Input on page 8) helps mitigate against bad programming code or clock signals, and/or poor

peripheral response.

The active-low manual reset input (see Manual Reset Input on page 8) allows for an externally activated system reset.

8.1 RESET/RESETN

lid Whenever the monitored supply voltage falls below its reset threshold, the RESET output asserts low or the RESETN output asserts high. Once

the monitored voltage has stabilized, an internal timer keeps the reset asserted for the reset timeout period (tRP). After the tRP period, the

RESET/RESETN output returns to its original state (see Figure 10).

a Figure 9. Functional Diagram of VCC Supervisory Application

ill v 5

VCC

s AGent st 3

m t MRN

a n 4

co WDI

AS1916 - AS1918

+

–

1.26V

VCC

Reset Timeout Delay

Generator

1

RESETN/

RESET

Watchdog Transition

Detector

Watchdog

Timer

2

GND

ical Figure 10. Reset Timing Diagram

hnVCC

1V

Tec RESETN

VTH

tRP

VTH

1V

tRD

RESET

tRP

tRD

GND

www.austriamicrosystems.com/Supervisors/AS1916

Revision 1.04

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