29LV160-120 데이터 시트보기 (PDF) - Alliance Semiconductor

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29LV160-120

3W 2M x 8 / 1M x 16 - CMOS Flash EEPROM

Alliance Semiconductor 

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Item

Unlock Bypass

Command Sequence

Chip Erase

Sector Erase

Common Flash

Interface

Description

The unlock bypass feature increases the speed at which the system programs bytes or words to the

device because it bypasses the first two unlock cycles of the standard program command sequence.

To initiate the unlock bypass command sequence, two unlock cycles must be written, then

followed by a third cycle which has the unlock bypass command, 20h.

The device then begins the unlock bypass mode. In order to program in this mode, a two cycle

unlock bypass program sequence is required. The first cycle has the unlock bypass program

command, A0h. It is followed by a second cycle which has the program address and data. To

program additional data, the same sequence must be followed.

The unlock bypass mode has two valid commands, the Unlock Bypass Program command and the

Unlock Bypass Reset command. The only way the system can exit the unlock bypass mode is by

issuing the unlock bypass reset command sequence. This sequence involves two cycles. The first

cycle contains the data, 90h. The second cycle contains the data 00h. Addresses are don’t care for

both cycles. The device then returns to reading array data.

Chip erase requires six bus cycles: two unlock write cycles; a setup command, two additional

unlock write cycles; and finally the Chip Erase command.

Chip erase does not require logical 0s to be written prior to erasure. When the automated on-chip

erase algorithm is invoked with the Chip Erase command sequence, AS29LV160 automatically

programs and verifies the entire memory array for an all-zero pattern prior to erase. The 29LV160

returns to read mode upon completion of chip erase unless DQ5 is set high as a result of exceeding

time limit.

Sector erase requires six bus cycles: two unlock write cycles, a setup command, two additional

unlock write cycles, and finally the Sector Erase command. Identify the sector to be erased by

addressing any location in the sector. The address is latched on the falling edge of WE; the

command, 30h is latched on the rising edge of WE. The sector erase operation begins after a sector

erase time-out.

To erase multiple sectors, write the Sector Erase command to each of the addresses of sectors to

erase after following the six bus cycle operation above. Timing between writes of additional sectors

must be less than the erase time-out period, or the AS29LV160 ignores the command and erasure

begins. During the time-out period any falling edge of WE resets the time-out. Any command

(other than Sector Erase or Erase Suspend) during time-out period resets the AS29LV160 to read

mode, and the device ignores the sector erase command string. Erase such ignored sectors by

restarting the Sector Erase command on the ignored sectors.

The entire array need not be written with 0s prior to erasure. AS29LV160 writes 0s to the entire

sector prior to electrical erase; writing of 0s affects only selected sectors, leaving non-selected

sectors unaffected. AS29LV160 requires no CPU control or timing signals during sector erase

operations.

Automatic sector erase begins after sector erase time-out from the last rising edge of WE from the

sector erase command stream and ends when the DATA polling (DQ7) is logical 1. DATA polling

address must be performed on addresses that fall within the sectors being erased. AS29LV160

returns to read mode after sector erase unless DQ5 is set high by exceeding the time limit.

In order to achieve long term system compatibility, certain information about the internal

configuration of the memory is provided which can be accessed in this mode. According to this

information, system software may be configured for both upward and downward compatibility

with Flash in a similar family. CFI mode can be entered by issuing CFI command either from read

or from autoselect mode. The system can read CFI information at the addresses given in the tables

below.

8/30/01; V.0.9.5

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