AS7C31025B 데이터 시트보기 (PDF) - Alliance Semiconductor

부품명

상세내역

제조사

AS7C31025B

3.3V 128K X 8 CMOS SRAM (Center power and ground)

Alliance Semiconductor 

AS7C31025B

®

Read cycle (over the operating range)3,9

-10

-12

-15

-20

Parameter

Symbol Min Max Min Max Min Max Min Max Unit Notes

Read cycle time

Address access time

Chip enable (CE) access time

Output enable (OE) access time

Output hold from address change

CE low to output in low Z

CE high to output in high Z

OE low to output in low Z

OE high to output in high Z

Power up time

Power down time

tRC

10 – 12 – 15 – 20 –

ns

tAA

– 10 – 12 – 15 – 20 ns

3

tACE

– 10 – 12 – 15 – 20 ns

3

tOE

– 5 – 6 – 7 – 8 ns

tOH

3 – 3 – 3 – 3 – ns

5

tCLZ

3–3–3–3–

ns 4, 5

tCHZ

–3–3

–4–5

ns 4, 5

tOLZ

0–0–

0–0–

ns 4, 5

tOHZ

–

5

–

6

–

7

–

8

ns 4, 5

tPU

0 – 0 – 0 – 0 – ns 4, 5

tPD

– 10 – 12 – 15 – 20 ns 4, 5

Key to switching waveforms

Rising input

Falling input

Undefined/don’t care

Read waveform 1 (address controlled)3,6,7,9

tRC

Address

tAA

DOUT

tOH

Data valid

Read waveform 2 (CE and OE controlled)3,6,8,9

CE

tRC1

tOE

OE

tOLZ

tOHZ

DOUT

tACE

Data valid

tCHZ

Supply

current

tCLZ

tPU

50%

tPD

ICC

50%

ISB

3/24/04, v. 1.3

Alliance Semiconductor

P. 4 of 9

Share Link: