AS7C31025B 데이터 시트보기 (PDF) - Alliance Semiconductor

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AS7C31025B

3.3V 128K X 8 CMOS SRAM (Center power and ground)

Alliance Semiconductor 

AS7C31025B

®

Write cycle (over the operating range)11

-10

-12

-15

-20

Parameter

Symbol Min Max Min Max Min Max Min Max Unit

Write cycle time

Chip enable (CE) to write end

Address setup to write end

Address setup time

Write pulse width

Write recovery time

Address hold from end of write

Data valid to write end

Data hold time

Write enable to output in high Z

Output active from write end

tWC

10 – 12 – 15 – 20 –

ns

tCW

8 – 9 – 10 – 12 –

ns

tAW

8 – 9 – 10 – 12 –

ns

tAS

0–0–0–0–

ns

tWP

7 – 8 – 9 – 12 –

ns

tWR

0–0–0–0–

ns

tAH

0–0–0–0–

ns

tDW

5 – 6 – 8 – 10 –

ns

tDH

0–0–0–0–

ns

tWZ

–5–6–7–8

ns

tOW

1–1–1–1–

ns

Notes

4, 5

4, 5

4, 5

Write waveform 1 (WE controlled)10,11

Address

WE

DIN

DOUT

tWC

tAW

tWP

tAS

tWZ

tWR

tAH

tDW

tDH

Data valid

tOW

Write waveform 2 (CE controlled)10,11

tWC

tAW

Address

CE

WE

DIN

DOUT

tAS

tCW

tWP

tWZ

tAH

tWR

tDW

tDH

Data valid

3/24/04, v. 1.3

Alliance Semiconductor

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