HI7106 데이터 시트보기 (PDF) - Intersil
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HI7106 Datasheet PDF : 11 Pages
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HI7106
Typical Integrator Amplifier Output Waveform (INT Pin)
AUTO ZERO PHASE
(COUNTS)
2999 - 1000
SIGNAL INTEGRATE
PHASE FIXED
1000 COUNTS
DE-INTEGRATE PHASE
0 - 1999 COUNTS
TOTAL CONVERSION TIME = 4000 x tCLOCK = 16,000 x tOSC
Detailed Description
Analog Section
Figure 2 shows the Analog Section for the HI7106. Each
measurement cycle is divided into three phases. They are
(1) auto-zero (A-Z), (2) signal integrate (INT) and (3) de-inte-
grate (DE).
Auto-Zero Phase
During auto-zero three things happen. First, input high and
low are disconnected from the pins and internally shorted to
analog COMMON. Second, the reference capacitor is
charged to the reference voltage. Third, a feedback loop is
closed around the system to charge the auto-zero capacitor
CAZ to compensate for offset voltages in the buffer amplifier,
integrator, and comparator. Since the comparator is included
in the loop, the A-Z accuracy is limited only by the noise of
the system. In any case, the offset referred to the input is
less than 10µV.
Signal Integrate Phase
During signal integrate, the auto-zero loop is opened, the
internal short is removed, and the internal input high and low
are connected to the external pins. The converter then
integrates the differential voltage between IN HI and IN LO
for a fixed time. This differential voltage can be within a wide
common mode range: up to 1V from either supply. If, on the
other hand, the input signal has no return with respect to the
converter power supply, IN LO can be tied to analog
COMMON to establish the correct common mode voltage. At
the end of this phase, the polarity of the integrated signal is
determined.
STRAY
CREF
STRAY
CREF+ REF HI
34
36
V+
REF LO CREF-
35
33
RINT
BUFFER V+
28
1
31
IN HI
10mA
INT
A-Z
32
COMMON
A-Z
DE-
DE+
A-Z
DE+
DE-
-
+
INPUT
HIGH
2.8V
N
+-
INT
30
IN LO
A-Z AND DE( )
CAZ
A-Z
29
CINT
INT
27
INTEGRATOR
+-
+-
6.2V
A-Z
COMPARATOR
INPUT
LOW
V-
FIGURE 2. ANALOG SECTION OF HI7106
TO
DIGITAL
SECTION
4
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