AT24C01C-CUM 데이터 시트보기 (PDF) - Atmel Corporation

부품명

상세내역

제조사

AT24C01C-CUM

I²C-Compatible (2-wire) Serial EEPROM 1-Kbit (128 x 8), 2-Kbit (256 x 8)

Atmel Corporation 

6. Device Operation

Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may

change only during SCL low time periods (see Figure 6-4 on page 8). Data changes during SCL high periods will indicate

a Start or Stop condition as defined below.

Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any

other command (see Figure 6-5 on page 8).

Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the Stop

command will place the EEPROM in a standby power mode (see Figure 6-5 on page 8).

Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The

EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.

Standby Mode: The AT24C01C/02C features a low power standby mode which is enabled:

 Upon power-up.

 After the receipt of the stop bit and the completion of any internal operations.

2-wire Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be reset by

following these steps:

1. Create a start bit condition.

2. Clock nine cycles.

3. Create another start bit followed by stop bit condition as shown in Figure 6-1.

The device is ready for the next communication after above steps have been completed.

Figure 6-1. Software reset

Dummy Clock Cycles

SCL

1

2

3

Start

Bit

SDA

8

9

Start

Bit

Stop

Bit

Atmel AT24C01C/02C [DATASHEET]

6

8700F–SEEPR–6/12

Share Link: