Features
• Low-voltage and Standard-voltage Operation
VCC = 1.7V to 5.5V
• Internally Organized as 32,768 x 8
• Two-wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz (5.0V, 2.7V, 2.5V), and 400kHz (1.7V) Compatibility
• Write Protect Pin for Hardware and Software Data Protection
• 64-byte Page Write Mode (Partial Page Writes Allowed)
• Self-timed Write Cycle (5ms Max)
• High Reliability
Endurance: One Million Write Cycles
Data Retention: 40 Years
• Lead-free/Halogen-free Devices Available
• 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead UDFN and 8-ball VFBGA Packages
• Die Sales: Wafer Form, Waffle Pack and Bumped Wafers
Description
The AT24C256C provides 262,144-bits of serial electrically erasable and
programmable read-only memory (EEPROM) organized as 32,768 words of eight
bits each. The device’s cascadable feature allows up to eight devices to share a
common two-wire bus. The device is optimized for use in many industrial and
commercial applications where low-power and low-voltage operation are essential.
The devices are available in space-saving 8-lead JEDEC SOIC, 8-lead TSSOP,
8-lead UDFN, and 8-ball VFBGA packages. In addition, this device operates from
1.7V to 5.5V.
Table 1. Pin Configurations
Pin Name
A0 – A2
SDA
SCL
WP
GND
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
Ground
A0
A1
A2
GND
8-lead SOIC
1
8
2
7
3
6
4
5
VCC
WP
SCL
SDA
8-lead TSSOP
A0 1
A1 2
8 VCC
7 WP
A2 3
6 SCL
GND 4
5 SDA
8-lead UDFN
VCC 8
WP 7
1 A0
2 A1
SCL 6 3 A2
SDA 5 4 GND
Bottom View
8-ball VFBGA
VCC 8
WP 7
1 A0
2 A1
SCL 6 3 A2
SDA 5 4 GND
Bottom View
Two-wire
Serial EEPROM
256K (32,768 x 8)
Atmel AT24C256C
8568C–SEEPR–5/10