AT24CS01(2014) 데이터 시트보기 (PDF) - Atmel Corporation

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AT24CS01
(Rev.:2014)

I2C-Compatible (2-wire) Serial EEPROM with a Unique, Factory Programmed 128-bit Serial Number 1-Kbit (128 x 8), 2-Kbit (256 x 8)

Atmel Corporation 

9. Write Operations

Byte Write: A Byte Write operation requires an 8-bit data word address following the device address word and

acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in

the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the

addressing device, such as a microcontroller, must terminate the write sequence with a Stop condition. At this

time the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled

during this write cycle and the EEPROM will not respond until the Write is complete.

Figure 9-1. Byte Write

S

W

T

R

A

I

R

T

T Device Address E

Word Address

S

T

O

Data

P

SDA LINE

M

RA

A

A

S

/C

C

C

B

WK

K

K

Page Write: The 1K and 2K EEPROM are capable of an 8-byte Page Write. A Page Write is initiated in the

same way as a Byte Write, but the microcontroller does not send a Stop condition after the first data word is

clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can

transmit up to seven data words. The EEPROM will respond with a zero after each data word received. The

microcontroller must terminate the Page Write sequence with a Stop condition.

Figure 9-2. Page Write

S

W

T

R

A

I

R

T

T Device Address E

Word Address (n)

SDA LINE

M

RA

A

S

/C

C

B

WK

K

Data (n)

Data (n + 1)

S

T

O

Data (n + x)

P

A

A

A

C

C

C

K

K

K

The data word address lower three bits are internally incremented following the receipt of each data word. The

higher data word address bits are not incremented, retaining the memory page row location. When the internally

generated word address reaches the page boundary, the subsequent byte loaded will be placed at the

beginning of the same page. If more than eight data words are transmitted to the EEPROM, the data word

address will roll-over and previously loaded data will be overwritten.

Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled,

acknowledge polling can be initiated. This involves sending a Start condition followed by the device address

word. The Read/Write bit is representative of the operation desired. Only if the internal write cycle has

completed will the EEPROM respond with a zero allowing the next read or write sequence to begin.

AT24CS01/02 [DATASHEET] 11

Atmel-8815D-SEEPROM-AT24CS01-02-Datasheet_082014

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