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AT25FS040 데이터 시트보기 (PDF) - Atmel Corporation

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AT25FS040
Atmel
Atmel Corporation Atmel
AT25FS040 Datasheet PDF : 25 Pages
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The AT25FS040 is enabled through the Chip Select pin (CS) and accessed via a 3-wire inter-
face consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All
write cycles are completely self-timed.
BLOCK WRITE protection for upper 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 or the entire memory array is
enabled by programming the status register. Separate write enable and write disable instruc-
tions are provided for additional data protection. Hardware data protection is provided via the
WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be
used to suspend any serial communication without resetting the serial sequence.
1. Absolute Maximum Ratings*
Operating Temperature....................................–40°C to +85°C
Storage Temperature .....................................–65°C to +150°C
Voltage on Any Pin
with Respect to Ground .................................... –1.0V to +5.0V
Maximum Operating Voltage ............................................ 4.2V
DC Output Current........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
Figure 1-1. Block Diagram
524,288 x 8
2 AT25FS040
5107E–SFLSH–8/07

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