AT88SC0204CA-MP 데이터 시트보기 (PDF) - Atmel Corporation

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AT88SC0204CA-MP

Atmel CryptoMemory

Atmel Corporation 

Table 4-2

AC Characteristics

Applicable over recommended operating range from VCC = +2.7 to 3.6V, TAC = -40°C to +85°C, CL = 30pF

(unless otherwise noted)

Symbol Parameter

fCLK

Async Clock Frequency

fCLK

Synch Clock Frequency

Clock Duty cycle

tR

“Rise Time - SDA/IO, RST”

tF

“Fall Time - SDA/IO, RST”

tR

Rise Time - SCL/CLK

tF

Fall Time - SCL/CLK

tAA

Clock Low to Data Out Valid

tHD.STA Start Hold Time

tSU.STA Start Set-up Time

tHD.DAT Data In Hold Time

tSU.DAT Data In Set-up Time

tSU.STO Stop Set-up Time

tDH

Data Out Hold Time

tWR

Write Cycle Time

Min

Max

1

4

0

1

40

60

1

1

9% x period

9% x period

250

200

200

10

100

200

20

5

Units

MHz

MHz

%

µS

µS

µS

µS

nS

nS

nS

nS

nS

nS

nS

mS

5. Device Operations for Synchronous Protocols

5.1 Clock and Data Transitions

The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time

periods (see Figure 5-3 on page 8). Data changes during SCL high periods will indicate a start or stop condition as defined

below.

5.1.1

Start condition

A high-to-low transition of SDA with SCL high defines a start condition which must precede all commands (see Figure 5-4 on

page 8).

5.1.2

Stop condition

A low-to-high transition of SDA with SCL high defines a stop condition. After a read sequence, the stop condition will place the

EEPROM in a standby power mode (see Figure 5-4 on page 8).

5.1.3

Acknowledge

All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to

acknowledge that it has received each word. This happens during the ninth clock cycle (see Figure 5-5 on page 8).

Atmel AT88SC0204CA [Summary DATASHEET]

6

5202FS−CRYPTO−12/11

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