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AT89C5121 데이터 시트보기 (PDF) - Atmel Corporation

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AT89C5121 Datasheet PDF : 115 Pages
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Table 1. Ports Description (Continued)
Port
Signal
Name
Alternate
Internal
Power
Supply
ESD Type Description
A/T8xC5121
ONLY FOR PLCC52 version
P0[7:0] AD[7:0]
VCC
P2[7:0] A[15:8]
P3.6
WR
P3.7
RD
ALE
PSEN
EA
PSEN
EA
VCC
DVCC
DVCC
VCC
VCC
VCC
I/O Input/Output function Port 0
P0 is an 8-bit open-drain bi-directional I/O port. Port 0 pins that
have 1s written to them float and can be used as high impedance
inputs. To avoid any parasitic current consumption, Floating P0
inputs must be pulled to VCC or VSS.
I/O Address/Data low
Mutiplexed Address/Data LSB for external access
I/O Input/Output function Port 2
P2 is an 8-bit open-drain bi-directional I/O port with internal pull-ups
O Address high
Address Bus MSB for external access
O Write signal
Write signal asserted during external data memory write operation
I Read signal
Read signal asserted during external data memory read operation
O Address latch enable output
The falling edge of ALE strobes the address into external latch
O Program strobe enable
I External access enable
This pin must be held low to force the device to fetch code from
external program memory starting at address 0000h. It is latched
during reset and cannot be dynamically changed during operation.
9
4164G–SCR–07/06

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