AT90S8515 데이터 시트보기 (PDF) - Atmel Corporation

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AT90S8515

8-bit Microcontroller with 8K Bytes In-System Programmable Flash

Atmel Corporation 

Sleep Modes

Idle Mode

Power-down Mode

AT90S8515

To enter the sleep modes, the SE bit in MCUCR must be set (one) and a SLEEP instruc-

tion must be executed. If an enabled interrupt occurs while the MCU is in a sleep mode,

the MCU awakes, executes the interrupt routine and resumes execution from the

instruction following SLEEP. The contents of the register file, SRAM and I/O memory

are unaltered. If a reset occurs during Sleep Mode, the MCU wakes up and executes

from the Reset vector.

When the SM bit is cleared (zero), the SLEEP instruction forces the MCU into the Idle

Mode, stopping the CPU but allowing Timer/Counters, Watchdog and the interrupt sys-

tem to continue operating. This enables the MCU to wake up from external triggered

interrupts as well as internal ones like Timer Overflow interrupt and Watchdog reset. If

wake-up from the Analog Comparator interrupt is not required, the Analog Comparator

can be powered down by setting the ACD-bit in the Analog Comparator Control and Sta-

tus Register (ACSR). This will reduce power consumption in Idle Mode. When the MCU

wakes up from Idle Mode, the CPU starts program execution immediately.

When the SM bit is set (one), the SLEEP instruction forces the MCU into the Power-

down mode. In this mode, the external oscillator is stopped, while the external interrupts

and the Watchdog (if enabled) continue operating. Only an external reset, a Watchdog

reset (if enabled), or an external level interrupt on INT0 or INT1 can wake up the MCU.

Note that when a level-triggered interrupt is used for wake-up from power-down, the low

level must be held for a time longer than the reset delay Time-out period tTOUT. Other-

wise, the MCU will fail to wake up.

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0841G–09/01

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