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ATA6624(2008) 데이터 시트보기 (PDF) - Atmel Corporation

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ATA6624 Datasheet PDF : 29 Pages
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ATA6622/ATA6624/ATA6626
Figure 4-3.
LIN Wake Up from Silent Mode
Bus wake-up filtering time
tbus
LIN bus
Node in silent mode
RXD
High
Fail-safe mode
Low
Normal mode
High
TXD
Watchdog
VCC
voltage
regulator
EN
Watchdog off
Silent mode 3.3V/5V/50 mA
Start watchdog lead time td
Fail safe mode 3.3V/5V/50 mA Normal mode
EN High
NRES
Undervoltage detection active
4.3 Sleep Mode
A falling edge at EN when TXD is low switches the IC into Sleep Mode. The TXD Signal has to
be logic low during the Mode Select window (Figure 4-4 on page 10). The transmission path is
disabled in Sleep Mode. The supply current IVSsleep from VBatt is typically 10 µA.
The VCC regulator is switched off. NRES and RXD are low. The internal slave termination
between the LIN pin and VS pin is disabled to minimize the power dissipation in the event that
the LIN pin is short-circuited to GND. Only a weak pull-up current (typically 10 µA) between the
LIN pin and the VS pin is present. Sleep Mode can be activated independently from the current
level on the LIN, WAKE, or KL_15 pin.
A voltage less than the LIN Pre_Wake detection VLINL at the LIN pin activates the internal LIN
receiver.
A falling edge at the LIN pin followed by a dominant bus level maintained for a certain time
period (tbus) and a rising edge at pin LIN respectively result in a remote wake-up request. The
device switches from Sleep Mode to Fail-safe Mode.
9
4986F–AUTO–07/08

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