ATC20 데이터 시트보기 (PDF) - Atmel Corporation
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ATC20 Datasheet PDF : 11 Pages
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Input/Output Pad Cell
Libraries
IO18lib, IO25lib and
IO33lib
The Atmel Input/Output Cell Library, IO18lib, contains a comprehensive list of input, out-
put, bidirectional and tristate cells. The ATC20 (1.8V) cell library includes two special
sets of I/O cells, IO25lib and IO33lib, for interfacing with external 2.5V and 3.3V devices.
Voltage Levels
The IO18lib library is made up exclusively of low-voltage chip interface circuits powered
by a voltage in the range of 1.65V to 1.95V. The library is compatible with the SClib 1.8-
volt standard cells library.
Power and Ground Pads
Designers are strongly encouraged to provide three kinds of power pairs for the IO18lib
library. These are “AC”, “DC” and core power pairs. AC power is used by the I/O to
switch its output from one state to the other. This switching generates noise in the AC
power buses on the chip. DC power is used by the I/O to maintain its output in a steady
state. The best noise performance is achieved when the DC power buses on the chip
are free of noise; designers are encouraged to use separate power pairs for AC and DC
power to prevent most of the noise in the AC power buses from reaching the DC power
buses. The same power pairs can be used to supply both DC power to the I/Os and
power to the core without affecting noise performance.
Table 6. VSS Power Pad Combinations
Core
Switching I/O
Quiet I/O
Vssi
VssAC
VssDC
•
•
•
•
•
•
•
•
•
•
Library Cell
Name
pv18i00
pv18a00
pv18d00
pv18e00
pv18b00
pv18f00
Signal Name
VSS
VSS
VSS
VSS
VSS
VSS
Table 7. VDD Power Pad Combinations
Core
Switching I/O
Quiet I/O
Vddi
VddAC
VddDC
•
•
•
•
•
•
•
•
•
•
Library Cell
Name
pv18i18
pv18a18
pv18d18
pv18e18
pv18b18
pv18f18
Signal Name
VDD
VDD
VDD
VDD
VDD
VDD
4 ATC20 Summary
1361BS–CBIC–09/02
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