ATC20 데이터 시트보기 (PDF) - Atmel Corporation

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ATC20

Cell-based ASIC

Atmel Corporation 

ATC20 Summary

Compiled Asynchronous

Dual-port RAM

Megacells

The Atmel Asynchronous Dual-port RAM has bidirectional or separate I/O ports, and

can be configured in multi-bank form, with a maximum of four banks.

The range of permitted Asynchronous Dual-port RAM Megacell configurations is as

follows:

Number of bits

128, .. 16K

Number of words(1) 64, .. 2K

Word Size(1)

2, .. 36 bits

Note: 1. Must be the same for both ports.

The following table shows the range of performances for particular Asynchronous Dual-

port RAM configurations under typical conditions.

Configuration

Density (Kbits/mm2)

Frequency (MHz)

Dynamic Power

(mW/MHz)

128 x 8 (1K bits)

22

305

0.09

256 x 16 (4K bits)

32

274

0.31

512 x 32 (16K bits)

36

248

0.41

Compiled Synchronous

ROM Megacells

The Atmel Synchronous ROM is diffusion programmable and is applicable in low power

solutions. It can be configured in multi-bank form, with a maximum of four banks.

The range of permitted Synchronous ROM Megacell configurations is as follows:

Number of bits

256, .. 512K

Number of words 64, .. 8K

Word Size

4, .. 72 bits

The following table shows the range of performances for particular Synchronous ROM

configurations under typical conditions.

Configuration

Density (Kbits/mm2)

Frequency (MHz)

Dynamic Power

(mW/MHz)

2K x 8 (16K bits)

400

190

0.13

4K x 16 (64K bits)

568

170

0.26

8K x 32 (256K bits)

669

120

0.54

9

1361BS–CBIC–09/02

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