AZ100LVEL16VRLR2 데이터 시트보기 (PDF) - Arizona Microtek, Inc

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AZ100LVEL16VRLR2

ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable

Arizona Microtek, Inc 

AZ100LVEL16VR

PACKAGE DIAGRAM

MLP 16

2.

INDEX AREA

(D/2 x E/2)

2x

aaa C

2x

aaa C

ccc C

A

4.

0.08 C

A1

D

D

2

TOP VIEW

SIDE VIEW

A

B

E

2

E

D2

D2/2

E2/2

E2

3x e 2

e

1

16 x b 3.

bbb M C A B

3x e

L

BOTTOM VIEW

A3

SEATING

C PLANE

NOTES:

1. DIMENSIONING AND TOLERANCING

CONFORM TO ASME T14-1994.

2. THE TERMINAL #1 AND PAD

NUMBERING CONVENTION SHALL

CONFORM TO JESD 95-1 SPP-012.

3. DIMENSION b APPLIES TO METALLIZED

PAD AND IS MEASURED BETWEEN 0.25

AND 0.30mm FROM THE PAD TIP.

4. COPLANARITY APPLIES TO THE

EXPOSED PAD AS WELL AS THE

TERMINALS

MILLIMETERS

DIM MIN MAX

A 0.80 1.00

A1 0.00 0.05

A3 0.25 REF

b 0.18 0.30

D 2.90 3.10

D2 0.25 1.95

E 2.90 3.10

E2 0.25 1.95

e 0.50 BSC

L 0.30 0.50

aaa

0.25

bbb

0.10

ccc

0.10

July 2002 * REV - 1

www.azmicrotek.com

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