AZ100EL11 데이터 시트보기 (PDF) - AZ Microtek
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AZ100EL11 Datasheet PDF : 6 Pages
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ARIZONA MICROTEK, INC.
AZ10EL11
AZ100EL11
ECL/PECL 1:2 Differential Fanout Buffer
FEATURES
• RoHS Compliant / Lead (Pb) Free
Packages available
• 265ps Propagation Delay
• 5ps Skew Between Outputs
• High Bandwidth Output Transitions
• 75kΩ Internal Input Pulldown Resistors
• Direct Replacement for ON
Semiconductor MC10EL11 &
MC100EL11
DESCRIPTION
PACKAGE AVAILABILITY
PACKAGE
PART NUMBER MARKING NOTES
SOIC 8
AZ10EL11D
AZM10
EL11
1,2
SOIC 8 RoHS
Compliant / Lead
(Pb) Free
AZ10EL11D+
AZM10+
EL11
1,2
SOIC 8
AZ100EL11D
AZM100
EL11
1,2
TSSOP 8
AZ10EL11T
AZT
EL11
1,2
TSSOP 8
AZ100LVEL11T
AZH
EL11
1,2
1 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)
Tape & Reel.
2 Date code format: “Y” or “YY” for year followed by “WW” for week on
underside of part.
The AZ10/100EL11 is a differential 1:2 fanout gate. The device is functionally similar to the E111 device but
with higher performance capabilities. Having within-device skews and output transition times significantly
improved over the E111, the EL11 is ideally suited for those applications that require the ultimate in AC
performance.
The differential inputs of the EL11 employ clamping circuitry to maintain stability under open input conditions.
If the inputs are left open (pulled to VEE) the Q outputs will go LOW.
NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
PIN DESCRIPTION
PIN
D, D¯
Q0, Q¯¯0, Q1, Q¯¯1
VCC
VEE
FUNCTION
Data Inputs
Data Outputs
Positive Supply
Negative Supply
Q0 1
Q0 2
Q1 3
Q1 4
8 VCC
7D
6D
5 VEE
1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541
www.azmicrotek.com
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