BD9202EFS 데이터 시트보기 (PDF) - ROHM Semiconductor
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BD9202EFS Datasheet PDF : 20 Pages
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BD9202EFS
Technical Note
○ Serial interface section
This IC is controlled by 4 line serial interfaces of CPUCLK, CPUCS,CPUDI and CPUDO. The data entry format and
timing are shown below.
In the case of WRITE
CPUCS
CPUCLK
CPUDI
tCSS
tCYC
tCLKH
tCSH
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
tDIS
tDIH
tCLKL
W A5 A4 A3 A2 A1 A0 * D7 D6 D5 D4 D3 D2 D1 D0
CPUDO
Hi-Z
In the case of READ
CPUCS
CPUCLK
CPUDI
CPUDO
tCSS
tCYC
tCLKH
tCSH
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
tDIS
tDIH
tCLKL
R A5 A4 A3 A2 A1 A0 * * * * * * * * *
Hi-Z
tDOD
D7 D6 D5 D4 D3 D2 D1 D0
Hi-Z
・It does not correspond to the continual entry of the data. It is necessary to set CPUCS into L in every address.
・There is no function of the automatic increment of address.
・Address width is correspondence to 6bit, but please do not access the address other than 00h-11h absolutely.
AC electric quality
Function
Symbol
Min
CPUCLK Periods
tCYC
100
CPUCLK high level width
tCLKH
35
CPUCLK low level width
tCLKL
35
CPUDI input set up time
ｔＤIＳ
50
CPUDI input hold time
ｔＤIＨ
50
CPUCS input set up time
ｔＣSＳ
50
CPUCS input hold time
ｔＣSＨ
50
CPUDO Output delay time
ｔＤOＤ
-
Limit
Typ
-
-
-
-
-
-
-
-
Unit
Max
-
ｎｓ
-
ｎｓ
-
ｎｓ
-
ｎｓ
-
ｎｓ
-
ｎｓ
-
ｎｓ
40
ｎｓ
（Output load：15pF）
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© 2009 ROHM Co., Ltd. All rights reserved.
7/19
2009.04 - Rev.A
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