BIT3193 데이터 시트보기 (PDF) - Unspecified

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BIT3193

High Performance PWM Controller

Unspecified 

Beyond Innovation Technology Co., Ltd.

Functional Description:

Trimmed Band Gap References: An internal trimmed

band-gap reference provides a high accuracy, supply

and temperature insensitive voltage reference. By

amplifying or dividing this voltage can generate the other

required references.

To Set the Operation Frequency of High

Frequency PWM Controller: An external capacitor

CCTOSC pin CTOSC determines the frequency as

equation (1)

The frequency of the high frequency PWM controller is:

FHFPWM =

K HF

C CTOSC

,

K HF

=

8.2e - 5 ............(1)

or a 100KHz operation PWM control system if an 820pF

capacitor is connected to pin CTOSC. Equation (1) is

valid only when VDD=6V, temperature=30ºC and

frequency ≈ 80K ~ 120KHz. Fig. 5 shows the

relationship between the frequency of the high frequency

PWM and CTOSC capacitance.

250.00

200.00

150.00

CTOSC VS. Frequency

BIT3193

Table 2 BIT3193 initial state

Pin Number Pin Name

1

INN

4

CTOSC

8

NOUT1

9

NOUT2

11

PWMOUT

12

CTPWM

Status

Force to VDD

( With ~ 60uA current source)

Normally run

Forced to GND level

Forced to GND level

Floating

Normally run

The Latched Off Protection_1: The ISEN pin may be

used to detect if the operation is under well control during

normal operation. In most of the applications to define a

“ staring period”, in which period no signal feed back from

the load side, is necessary. BIT3193 disable the latched

off function when TIMER < 2.5V. If TIMER >2.5V and

ISEN < 1.3V for 32 cycles of low frequency PWM.

BIT3193 will shut the output pins NOUT1 and NOUT2

down until the system is powered on again.

The Latched Off Protection_2: The CLAMP pin may

be used to detect if the PWM control system operates

normally too. A ~ 60uA current source will charge the INN

pin to reduce the output of CMP while CLAMP > 2.0V.

The latched off over voltage protection performs while

TIMER > 2.5V. If TIMER > 2.5V and CLAMP >2.0 V for

14 cycles of high frequency PWM. BIT3193 will shut the

output pins NOUT1 and NOUT2 down until the system is

powered on again.

100.00

50.00

0.00

300 500 700 900 1100 1300 1500

FCigTO.5SC(pF)

The Power On Initialization: An internal current

source charges the external capacitor connected on

TIMER pin determines the initialization timing of BIT3193.

This current provides ~ 20uA when TIMER pin less than

0.3V, and ~ 1uA when TIMER pin > 0.3V. BIT3193 is in

an “initial state” when TIMER < 0.3V. Table 2 lists the

status of each key features during TIMER < 0.3V.

To Set The Frequency Deviation of High Frequency

PWM During Different Loading Condition: The

LOAD pin may be used to change the frequency of

CTOSC when ISEN < 1.3V. In many cases, the resonance

frequency of the load is varied while the load is changed.

For obtaining the better performance, the operation

frequency of the PWM controller must fit to the resonance

frequency of the load. A connect to GND resistor may

increase the operation frequency of CTOSC. The

following diagram shows how the load resistance changes

the 100KHz operation frequency of CTOSC pin. In

above case, CTOSC is connected by an 820pF capacitor.

The normal operation frequency of high frequency PWM is

100KHz. If a different frequency says Fn is the set for

normal operation.

04/11/08

Confidential, for authorized user only

page 4 of 10

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