BIT3193-SO 데이터 시트보기 (PDF) - Unspecified

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BIT3193-SO

High Performance PWM Controller

Unspecified 

Beyond Innovation Technology Co., Ltd.

Note 1. The output driver frequency is the half of the ramp wave frequency.

Note 2. Only verified by simulation. Not 100% tested.

Note 3. The voltages of the output drivers are pulled to GND in each off states.

BIT3193

Timing Diagram

BIT3193 fixed frequency push pull driving methodology to drive the load. The power switches;

NMOSFETs are driven by fixed frequency PWM controlled signals. The detail timing relationship is shown as

bellow: The maximum duty cycle of NOUT1 and NOUT2 are < 50% with 180° phase shift.

Fig. 3

The timing of another low frequency PWM generator is as bellow: A 51Kohm pulled-low resistor is

connected on PWMOUT pin in this example.

PWMDC

ISEN(TIMER)

PWMOUT ( MODE = " 0" )

CTPWM

1.3V(2.5V)

PWMOUT ( MODE = " 1" )

Fig. 4

04/11/08

Confidential, for authorized user only

page 7 of 10

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