BR34E02-W 데이터 시트보기 (PDF) - ROHM Semiconductor

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BR34E02-W

Double-cell Memory for Plug & Play DDR/DDR2 (For memory module) SPD Memory

ROHM Semiconductor 

●Command

○Write Cycle

During WRITE CYCLE operation data is written in the EEPROM. The Byte Write Cycle is used to write only one byte. In

the case of writing continuous data consisting of more than one byte, Page Write is used. The maximum bytes that can

be written at one time is 16 bytes.

SDA

LINE

S

W

T

R

A

I

R

SLAVE T

T

ADDRESS E

WORD

ADDRESS

DATA

1 0 1 0 A2 A1 A0

WA

7

WA

0

D7

RA

A

/C

C

WK

K

Fig.33 Byte Write Cycle Timing

S

T

O

P

D0

A

C

K

SDA

L IN E

S

W

T

R

A

I

R

SLAVE

T

T ADDRESS E

W ORD

ADDRESS(n)

DATA(n)

1 0 1 0 A 2A 1A 0

WA

7

WA

0

D7

RA

A

/C

C

WK

K

Fig.34 Page Write Cycle Timing

D0

A

C

K

S

T

O

D A T A (n + 1 5 )

P

D0

A

C

K

・With this command the data is programmed into the indicated word address.

・When the Master generates a STOP condition, the device begins the internal write cycle to the nonvolatile memory

array.

・Once programming is started no commands are accepted for tWR (5ms max.).

・This device is capable of sixteen-byte Page Write operations.

・If the Master transmits more than sixteen words prior to generating the STOP condition, the address counter will “roll

over” and the previously transmitted data will be overwritten.

・When two or more byte of data are input, the four low order address bits are internally incremented by one after the

receipt of each word, while the four higher order bits of the address (WA7～WA4) remain constant.

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