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DS1832 데이터 시트보기 (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS1832
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS1832 Datasheet PDF : 7 Pages
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TIMING DIAGRAM: POWER-UP Figure 7
DS1832
RST VALID TO 0 VOLTS VCC Figure 8
OUTPUT VALID CONDITIONS
The RST output uses a push-pull output which can maintain a valid output down to 0.8 volts VCC. To sink
current below 0.8 volts a resistor can be connected from RST to Ground (see Figure 8). This arrangement
will maintain a valid value on RST during both power-up and power-down but will draw current when
RST is in the high state. A value of about 100 k=should be adequate in most situations. The output with
a resistor pull-down can maintain a valid reset down to VCC equal to 0 volts.
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