Q67060-S6953A3 데이터 시트보기 (PDF) - Siemens AG
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Q67060-S6953A3 Datasheet PDF : 15 Pages
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Target Data Sheet BTS560
Pin
1
2
3
4
5
Symbol
OUT
IN
Vbb
IS
OUT
Function
O Output to the load. The pins 1 and 5 must be shorted with each other
especially in high current applications!3)
I Input, activates the power switch in case of short to ground
+ Positive power supply voltage, the tab is electrically connected to this pin.
In high current applications the tab should be used for the Vbb connection
instead of this pin4).
S Diagnostic feedback providing a sense current proportional to the load
current; zero current on failure (see Truth Table on page 6)
O
Output to the load. The pins 1 and 5 must be shorted with each other
especially in high current applications!3)
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 4)
Supply voltage for full short circuit protection,
resistive load or L < tbd µH
Tj,start =-40 ...+150°C:
Load current (short circuit current, see page 4)
Load dump protection VLoadDump = UA + Vs, UA = 13.5 V
RI5) = 2 Ω, RL = 0.1 Ω, td = 200 ms,
IN, IS = open or grounded
Operating temperature range
Storage temperature range
Power dissipation (DC), TC ≤ 25 °C
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, Tj,start = 150°C, TC = 150°C const.,
IL = tbd (>=20) A, ZL = tbd mH, 0 Ω, see diagrams on page 9
Electrostatic discharge capability (ESD)
Human Body Model acc. MIL-STD883D, method 3015.7 and ESD
assn. std. S5.1-1993, C = 100 pF, R = 1.5 kΩ
Current through input pin (DC)
Current through current sense status pin (DC)
see internal circuit diagrams on page 7
Symbol
Vbb
Vbb
IL
VLoad dump6)
Tj
Tstg
Ptot
EAS
VESD
IIN
IIS
Values Unit
60 V
55 V
self-limited A
80 V
-40 ...+150 °C
-55 ...+150
310 W
tbd
J
2.0 kV
+15 , -250 mA
+15 , -250
3) Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current
capability and decrease the current sense accuracy
4) Otherwise add up to 0.5 mΩ (depending on used length of the pin) to the RON if the pin is used instead of
the tab.
5) RI = internal resistance of the load dump test pulse generator.
6) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.
Semiconductor Group
Page 2
1998-Jun-17
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