PDM34088SA10QTR 데이터 시트보기 (PDF) - Paradigm Technology

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PDM34088SA10QTR

3.3V 64K x 32 Fast CMOS Synchronous Static RAM with Burst Counter and Output Register

Paradigm Technology 

PRELIMINARY

PDM34088

3.3V 64K x 32 Fast CMOS

Synchronous Static RAM

1 with Burst Counter

and Output Register

Features

n Interfaces directly with the x86, Pentium™,

680X0 and PowerPC™ processors

(100, 80, 66, 60, 50 MHz)

n Single 3.3V power supply

n Mode selectable for interleaved or linear burst:

Interleaved for x86 and Pentium

Linear for 680x0 and PowerPC

n High-speed clock cycle times:

7.5, 10, 12.5, 15 and 20 ns

n High-density 64K x 32 architecture with burst

address counter and output register

n Fully registered inputs and outputs for pipelined

operation

n High-output drive: 30 pF at rated TA

n Asynchronous output enable

n Self-timed write cycle

n Separate byte write enables and one global write

enable

n Internal burst read/write address counter

n Internal registers for address, data, controls

n Output data register

n Burst mode selectable

n Sleep mode

n Packages:

100-pin QFP - (Q)

100-pin TQFP - (TQ)

Description

2 The PDM34088 is a 2,097,152 bit synchronous

random access memory organized as 65,536 x 32

bits. This device designed with burst mode

3 capability and interface controls to provide high-

performance in second level cache designs for x86,

Pentium, 680x0, and PowerPC microprocessors.

Addresses, write data and all control signals except

4 output enable are controlled through positive edge-

triggered registers. Write cycles are self-timed and

are also initiated by the rising edge of the clock.

Controls are provided to allow burst reads and

5 writes of up to four words in length. A 2-bit burst

address counter controls the two least-significant

bits of the address during burst reads and writes.

The burst address counter selectively uses the 2-bit

6 counting scheme required by the x86 and Pentium

or 680x0 and PowerPC microprocessors as con-

trolled by the mode pin. Individual write strobes

provide byte write for the four 8-bit bytes of data.

An asynchronous output enable simplifies interface

to high-speed buses.

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TM i486, Pentium are trademarks of Intel Corp. PowerPC is a trademark of the International Business Machines Corporation.

Rev 2.1 - 5/01/98

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