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APW7026 데이터 시트보기 (PDF) - Anpec Electronics

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APW7026 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
APW7026
Electrical Characteristics Cont.
1. Recommended operating conditions, Unless otherwise noted.
2. Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic.
Sym bol
P a ra m e te r
P R O T E C T IO N
V S E N 1 O .V. trip p o in t (V S E N 1 /V R EF1)
V S E N 1 O .V. H y s te re s is
V 3 .3 O .V. trip p o in t
V 3 .3 O .V. H y s te re s is
lO VP F A U LT S o u rin g C u rre n t
O C S E T 1 ,2 C u rre n t S o u rc e
R SS P u ll u p re s is to r to 5 V
POW ER GOOD
V S E N 1 U p p e r T h re s h o ld
(V S E N 1 /V REF1)
V S E N 1 L o w e r T h re s h o ld
V S E N 1 P G D H y s te re s is
V 3 .3 L o w e r T h re s h o ld
V 3 .3 P G D H y s te re s is
F B 3 L o w e r T h re s h o ld
F B 3 P G D H y s te re s is
V PG O O D P G O O D V o lta g e L o w
Te s t C o n d itio n s
V S E N 1 R is in g
V 3 .3 R is in g
V FA U LT /R T = 2 .0 V
Vo cse t = 4 .5 V
APW 7026
M in
Ty p
M ax
170
11 8
2
4 .1
0 .1
25
200
23
230
V S E N 1 R is in g
11 0
V S E N 1 R is in g
U p p e r/L o w e r T h re s h o ld
V 3 .3 R is in g
V FB3 R is in g
lP G O O D = -4 m A
94
2
2 .5
0 .1
1 .0
0 .1
0 .8
U n it
%
%
V
V
mA
uA
K
%
%
%
V
V
V
V
V
Functional Pin Description
UGATE1 (Pin 1)
Connect UGATE1 pin to the SYNC PWM Converter’s
upper MOSFET gate .This pin provides the gate drive
for the upper MOSFET.
VCC (Pin 2)
Provide a + 12V bias supply for the IC to this pin . This
pin also provides the gate bias charge for all the
MOSFETs controlled by the IC. The voltage at this pin is
monitored for Power-On Reset (POR) purpose.
UGATE2 (Pin 3)
Connect UGATE2 pin to the ASYNC PWM converter’s
MOSFET gate . This pin provides the gate drive for the
MOSFET.
PHASE2 (Pin 4)
Connect the PHASE2 pin to the ASYNC PWM
converter’s MOSFET source. This pin is used to monitor
the voltage drop across the MOSFET for over-current
protection.
PGOOD (Pin 5)
PGOOD is an open drain output used to indicate the
status of the output voltages. This pin is pulled low when
the SYNC PWM regulator output is not within ± 10%
of the reference voltage (VREF1) or when V3.3 or VFB3 is
below its lower power good threshold.
OCSET2 (Pin 6)
Connect a resistor (R ) from this pin to the drain of
OCSET
the ASYNC PWM converter’s MOSFET . R , an
OCSET
internal 200µA current source (IOCSET ) , and the
MOSFET’s on-resistance (r ) set the converter’s
DS(ON)
over-current (OC) trip point according to the following
equation:
IPEAK =
IOCSET x ROCSET
rDS(ON)
An over-current trip cycles the soft-start function.
FB2 (Pin 7)
Connect this pin to the output of the ASYNC PWM
converter . The voltage at this pin is regulated to the
reference voltage VREF2 . A resistor driver is connected
from this pin to VOUT2(ROUT2) and to GND(RGND2) that sets
the output voltage as the following equation :
Copyright ANPEC Electronics Corp.
4
Rev. A.2 - Sep., 2001
www.anpec.com.tw

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