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UDA1344TS

Low-voltage low-power stereo audio CODEC with DSP features

Philips Electronics 

Philips Semiconductors

Low-voltage low-power stereo audio

CODEC with DSP features

Product specification

UDA1344TS

Mute (ADC)

On recovery from power-down or switching on of the

system clock, the serial data output on pin DATAO is held

at LOW level until valid data is available from the

decimation filter. This time depends on whether the

DC-cancellation filter is selected:

• DC cancel off:

t = 1----0-f--s2----4- ; t = 23.2 ms at fs = 44.1 kHz

• DC cancel on:

t = 1----2---f2--s--8---8-- ; t = 279 ms at fs = 44.1 kHz.

Interpolation filter (DAC)

The digital filter interpolates from 1fs to 128fs by means of

a cascade of a recursive filter and an FIR filter.

Table 4 Interpolation filter characteristics

ITEM

Pass-band ripple

Stop band

Dynamic range

Gain

CONDITIONS

0 − 0.45fs

>0.55fs

0 − 0.45fs

DC

VALUE (dB)

±0.03

−50

108

−3.5

Noise shaper (DAC)

The 3rd-order noise shaper operates at 128fs. It shifts

in-band quantization noise to frequencies well above the

audio band. This noise shaping technique enables high

signal-to-noise ratios to be achieved. The noise shaper

output is converted into an analog signal using a Filter

Stream Digital-to-Analog Converter (FSDAC).

Multiple format input/output interface

The UDA1344TS supports the following data input/output

formats:

• I2S-bus format with data word length of up to 20 bits

• MSB-justified serial format with data word length of up to

20 bits

• LSB-justified serial format with data word lengths of

16, 18 or 20 bits (in L3 mode only)

• Combined data formats:

– L3 mode: MSB-justified data output and

LSB-justified 16, 18 and 20 bits data input

– Static pin mode: MSB-justified data output and

LSB-justified 16 and 20 bits data input.

The formats are illustrated in Fig.3. Left and right

data-channel words are time multiplexed.

Control mode selection

The UDA1344TS can be used under L3 microcontroller

interface control or static pin control. The mode can be set

via the mode control pins MC1 and MC2 (see Table 5).

Table 5 Mode control pins

PIN MC2

LOW

LOW

HIGH

HIGH

PIN MC1

LOW

HIGH

LOW

HIGH

MODE

L3 mode

Test mode

Static pin mode

Important: in the L3 mode the UDA1344TS is completely

pin and function compatible with the UDA1340M.

Filter stream DAC

The FSDAC is a semi-digital reconstruction filter that

converts the 1-bit data stream of the noise shaper to an

analog output voltage. The filter coefficients are

implemented as current sources and are summed at

virtual ground of the output operational amplifier. In this

way very high signal-to-noise performance and low clock

jitter sensitivity is achieved. A post-filter is not needed due

to the inherent filter function of the DAC. On-board

amplifiers convert the FSDAC output current to an output

voltage signal capable of driving a line output.

The output voltage of the FSDAC scales proportionally

with the power supply voltage.

2001 Jun 29

7

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