LCX011AM
2. Clock timing conditions (16:9 display mode)
Item
Hst rise time
Hst fall time
HST
Hst data set-up time
HCK
Hst data hold time
Hckn∗4 rise time
Hckn∗4 fall time
Hck1 fall to Hck2 rise time
Hck1 rise to Hck2 fall time
Vst rise time
Vst fall time
VST
Vst data set-up time
Vst data hold time
Vck rise time
VCK
Vck fall time
Enb rise time
Enb fall time
ENB
Vck rise/fall to Enb rise time
Enb pulse width
Pcg rise time
Pcg fall time
PCG
Pcg fall to Vck rise/fall time
Pcg pulse width
∗4 Hckn means Hck1 and Hck2.
(Ta = 25°C) (fHCKn = 5.6MHz, fVCK = 15.7kHz)
Symbol
trHst
tfHst
tdHst
thHst
trHckn
tfHckn
to1Hck
to2Hck
trVst
tfVst
tdVst
thVst
trVck
tfVck
trEnb
tfEnb
tdEnb
twEnb
trPcg
tfPcg
toVck
twPcg
Min.
—
—
74
–15
—
—
–15
–15
—
—
5
5
—
—
—
—
350
3450
—
—
–50
2050
Typ.
—
—
89
0
—
—
0
0
—
—
15
15
—
—
—
—
400
3500
—
—
0
2100
Max. Unit
30
30
104
15
30
ns
30
15
15
100
100
25
µs
25
100
100
100
100
450
ns
3550
20
20
50
2150
–6–