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CDP1802AC/3

High-Reliability CMOS 8-Bit Microprocessor

Intersil 

DATASHEET

CDP1802AC/3

High-Reliability CMOS 8-Bit Microprocessor

FN1441

Rev 3.00

October 17, 2008

The CDP1802A/3 High-Reliability LSI CMOS 8-bit register

oriented Central-Processing Unit (CPU) is designed for use

as a general purpose computing or control element in a wide

range of stored-program systems or products.

The CDP1802A/3 includes all of the circuits required for

fetching, interpreting, and executing instructions which have

been stored in standard types of memories. Extensive

input/output (I/O) control features are also provided to

facilitate system design.

The 1800 Series Architecture is designed with emphasis on

the total microcomputer system as an integral entity so that

systems having maximum flexibility and minimum cost can be

realized. The 1800 Series CPU also provides a synchronous

interface to memories and external controllers for I/O devices,

and minimizes the cost of interface controllers. Further, the I/O

interface is capable of supporting devices operating in polled,

interrupt-driven, or direct memory-access modes.

The CDP1802AC/3 is functionally identical to its

predecessor, the CDP1802. The “A” version includes some

performance enhancements and can be used as a direct

replacement in systems using the CDP1802.

This type is supplied in a 40 Ld dual-in-line sidebrazed

ceramic package (D suffix).

Features

For Use In Aerospace, Military, and Critical Industrial

Equipment

• Minimum Instruction Fetch-Execute Time of 4.5µs

(Maximum Clock Frequency of 3.6MHz) at VDD = 5V,

TA = +25°C

• Operation Over the Full Military

Temperature Range . . . . . . . . . . . . . . . -55°C to +125°C

• Any Combination of Standard RAM and ROM Up to

65,536 Bytes

• 8-Bit Parallel Organization With Bi-directional Data

Bus and Multiplexed Address Bus

• 16x16 Matrix of Registers for Use as Multiple Program

Counters, Data Pointers, or Data Registers

• On-Chip DMA, Interrupt, and Flag Inputs

• High Noise Immunity . . . . . . . . . . . . . . . . . . 30% of VDD

• Pb-Free (RoHS compliant)

Ordering Information

PART

NUMBER

PART

MARKING

TEMP. RANGE

(°C)

CLOCK FREQUENCY

AT 5V

PACKAGE

PKG

DWG. #

CDP1802ACD3

CDP1802ACD3

-55 to +125

Up to 3.2MHz

40 Ld SBDIP

D40.6

NOTE: These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible

with both SnPb and Pb-free soldering operations.

FN1441 Rev 3.00

October 17, 2008

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