CL-PS6700-VC-A 데이터 시트보기 (PDF) - Cirrus Logic

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CL-PS6700-VC-A

Low-Power PC Card Controller for the CL-PS7111

Cirrus Logic 

CL-PS6700

Low-Power PC Card Controller

3.2 Power States

3.2.1 Active State

The Active State is the normal operating state entered whenever PC Card accesses are required. In this

state the PCLK input is active, the PSLEEP_L input is deasserted, and the Idle bit in the Power Manage-

ment register is cleared.

3.2.2 Idle State

Normally, Idle State is entered/exited dynamically in hardware (by CL-PS6700 control logic) transparent

to software. This method is invoked by setting the Enable Auto Idle Mode bit in the Power Management

register, and appears identical to the Active State, except that some internal clocks are gated off between

transactions to conserve power. The software can enter Idle State explicitly by setting the Idle mode. In

this case, access to the CL-PS6700 registers is supported, but PC Card accesses do not propagate to

the card and a read fail or write fail event can occur, which can generate an interrupt to the host.

3.2.3 Standby State

Standby State is the lowest power state in the system and is entered by asserting the PSLEEP_L input.

At least two (rising) clock edges are required after PSLEEP_L is asserted before the PCLK is shut off. In

the Standby State the CL-PS6700 core and system interface power can remain on, but consumes near

zero power (microwatts). If card transactions are queued in the CL-PS6700 when PSLEEP_L is asserted,

they are either aborted or continue until finished (requiring more than two clocks), depending on the set-

ting of bit 9 (Standby Request During Card Access) in the Power Management register.

CIRRUS LOGIC CONFIDENTIAL, NDA REQUIRED

20

FUNCTIONAL DESCRIPTION

November 1997

PRELIMINARY DATA BOOK v1.0

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