CMX850 데이터 시트보기 (PDF) - CML Microsystems Plc
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CMX850 Datasheet PDF : 103 Pages
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Communications Controller
CMX850
The CMX850 modem and ADC interfaces are capable of detecting and decoding small amplitude signals.
To achieve this, DVDD, AVDD and VBIAS should be decoupled and the receive path protected from
extraneous in-band signals. It is recommended that the printed circuit board is laid out with AVSS and DVSS
ground planes in the CMX850 area, as shown in Figure 2b, with provision to make a link between them
close to the CMX850. To provide a low impedance connection to ground, the decoupling capacitors C1 –
C7, C12, C13 and C15 – C17 must be mounted as close to the CMX850 as possible and connected directly
to their respective ground plane. The use of surface mounted capacitors is recommended.
VBIAS is used as an internal reference for detecting and generating the various analogue signals. It must be
carefully decoupled, to ensure its integrity. Apart from the decoupling capacitor shown (C12), no other loads
are allowed. If VBIAS needs to be used to set external analogue levels, it must be buffered with a high input
impedance buffer.
VREF is the internal reference voltage generated for the ADC. For best ADC performance, it is
recommended that a 1nF capacitor be placed on this pin and connected to AVSS. The pin may also be used
as a reference voltage externally (see section 1.5.8), however it is recommended that a maximum of 1µA is
drawn from the pin. If more current is required externally, then a suitable buffer must be used.
The DVSS to the Xtal oscillator capacitors C8 – C11 should be of low impedance and preferably be part of
the DVSS ground plane to ensure reliable start up. The resistor across the 32.768kHz Xtal should be 10MΩ
for best performance. Using a smaller resistor will result in increased power consumption.
AVSS Ground Plane
AVDD
AVSS
L1
C1+
AVSS
C2
AVSS
C3
AVSS
Provision
for a
Wire Link
AVDD
VREF
C13
AVSS
C15
C7
DVSS
DVSS
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
AVSS
VBIAS
C12
AVDD
DVSS
98
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
DVSS
DVSS
DVDD
DVSS
C6
DVSS
DVDD
DVSS
C16
C5
DVSS DVSS DVSS
DVSS
DVSS Ground Plane
C17+
DVSS
L2
C4+
DVSS
DVDD
DVSS
Figure 2b Recommended Power Supply Connections and De-coupling
C1, C4, C17
C5, C6, C7,
C15, C16
L1
10µF
100nF
100nF
100nH
(optional, see note)
C2, C3, C12 100nF
C13
1nF
L2
100nH
(optional, see note)
Note: The inductors L1 and L2 can be omitted but this may degrade system performance.
© 2003 CML Microsystems Plc
11
D/850/6
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