CDB4224 데이터 시트보기 (PDF) - Cirrus Logic
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CDB4224 Datasheet PDF : 34 Pages
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CS4223 CS4224
SWITCHING CHARACTERISTICS - CONTROL PORT - I2C MODE (CS4224)
(Inputs: Logic 0 = DGND, Logic 1 = VD; CL = 30 pF)
Parameter
Symbol
Min
Max
Unit
I2C® Mode (SPI/I2C = 1)
SCL Clock Frequency
RST rising edge to Start
fscl
-
(Note 15)
tirs
50
Bus Free Time between transmissions
tbuf
4.7
Start Condition Hold Time (prior to first clock pulse)
thdst
4.0
Clock Low Time
tlow
4.7
Clock High Time
thigh
4.0
Setup time for repeated Start Condition
tsust
4.7
SDA hold time for SCL falling
(Note 16) thdd
0
SDA setup time to SCL rising
tsud
250
Rise time of SCL
trc
-
Fall time of SCL
tfc
-
Rise time of SDA
trd
-
Fall time of SDA
tfd
-
Setup time for Stop Condition
tsusp
4.7
100
kHz
-
µs
-
µs
-
µs
-
µs
-
µs
-
µs
-
µs
-
ns
25
ns
25
ns
1
µs
300
ns
-
µs
Notes: 15. Not tested but guaranteed by design.
16. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
RST
t irs
Stop
Start
SDA
SCL
t buf
t hdst
t high
t low t hdd
Repeated
Start t rd
t hdst
t fc
t sud
t sust
t rc
Stop
t fd
t susp
Figure 3. I2C Control Port Timing
DS290F1
11
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