CS43L21 데이터 시트보기 (PDF) - Cirrus Logic

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CS43L21

Low Power, Stereo Digital to Analog Converter

Cirrus Logic 

1. PIN DESCRIPTIONS - SOFTWARE (HARDWARE) MODE

CS43L21

32 31 30 29 28 27 26 25

LRCK 1

SDA/CDIN (MCLKDIV2) 2

SCL/CCLK (I²S/LJ) 3

ADO/CS (DEM) 4

VA_HP 5

FLYP 6

GND_HP 7

FLYN 8

CS43L21

24 TSTO

23 TSTO

22 TSTO

21 TSTO

20 TSTO

19 TSTO

18 TSTO

17 TSTO

9 10 11 12 13 14 15 16

Pin Name

LRCK

SDA/CDIN

(MCLKDIV2)

SCL/CCLK

(I²S/LJ)

AD0/CS

(DEM)

VA_HP

FLYP

GND_HP

FLYN

VSS_HP

#

Pin Description

1 Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the

serial audio data line.

Serial Control Data (Input/Output) - SDA is a data I/O in I²C Mode. CDIN is the input data line for the

2 control port interface in SPI Mode.

MCLK Divide by 2 (Input) - Hardware Mode: Divides the MCLK by 2 prior to all internal circuitry.

Serial Control Port Clock (Input) - Serial clock for the serial control port.

3 Interface Format Selection (Input) - Hardware Mode: Selects between I²S & Left-Justified interface for-

mats for the DAC.

Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C Mode; CS

4 is the chip-select signal for SPI format.

De-Emphasis (Input) - Hardware Mode: Enables/disables the de-emphasis filter.

5 Analog Power For Headphone (Input) - Positive power for the internal analog headphone section.

6 Charge Pump Cap Positive Node (Input) - Positive node for the external charge pump capacitor.

7 Analog Ground (Input) - Ground reference for the internal headphone/charge pump section.

8 Charge Pump Cap Negative Node (Input) - Negative node for the external charge pump capacitor.

9 Negative Voltage From Charge Pump (Output) - Negative voltage rail for the internal analog head-

phone section.

6

DS723A1

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