CDB5368(2005) 데이터 시트보기 (PDF) - Cirrus Logic
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CDB5368 Datasheet PDF : 39 Pages
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CS5368
Stand-Alone Mode
CLKMODE
34
CLKMODE (Input) Setting this pin HIGH places a divide-by-1.5 circuit in the MCLK
path to the core device circuitry.
DIF1, DIF0
37, 38 DIF1, DIF0 (Input) - Inputs of the audio interface format.
M1, M0
39,40 Mode Selection (Input) - Determines the operational mode of the device.
MDIV
42
MCLK Divider (Input) Setting this pin HIGH places a divide-by-2 circuit in the MCLK
path to the core device circuitry.
Control Port Mode
CLKMODE
34
AD1/CDIN
37
AD0/CS
38
SCL/CCLK
39
SDA/CDOUT
40
MDIV
42
CLKMODE (Input) This pin is ignored in Control Port Mode and the same functionality
is obtained from the corresponding bit in the Global Control Register. Note: Should be
connected to GND.
I²C Format, AD1 (Input) - Forms the device address input AD[1].
SPI Format, CDIN (Input) - Becomes the input data pin.
I²C Format, ADO (Input) - Forms the device address input AD[0].
SPI Format, CS (Input) - Acts as the active low chip select input.
I²C Format, SCL (Output) - Acts as the serial clock output from the CS5368.
SPI Format, CCLK (Output) - Acts as the serial clock output from the CS5368.
I²C Format SDA (Input/Output) - Acts as an input/output data pin.
SPI Format CDOUT (Output) - Acts as an output only data pin.
MCLK Divider (Input) This pin is ignored in Control Port Mode and the same function-
ality is obtained from the corresponding bit in the Global Control Register.
Note: Should be connected to GND.
DS624A1
11
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