CS61577-IL1Z 데이터 시트보기 (PDF) - Cirrus Logic

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CS61577-IL1Z

T1/E1 Line Interface

Cirrus Logic 

37)4#().'#(!2!#4%2)34)#3(TA = -40° to 85°C; TV+, RV+ = ±5%;

Inputs: Logic 0 = 0V, Logic 1 = RV+)

0ARAMETER

SDI to SCLK Setup Time

SCLK to SDI Hold Time

SCLK Low Time

SCLK High Time

SCLK Rise and Fall Time

CS to SCLK Setup Time

SCLK to CS Hold Time

CS Inactive Time

SCLK to SDO Valid

CS to SDO High Z

Input Valid To PCS Falling Setup Time

PCS Rising to Input Invalid Hold Time

PCS Active Low Time

Notes: 33. Output load capacitance = 50pF

3YMBOL -IN

4YP

tdc

50

-

tcdh

50

-

tcl

240

-

tch

240

-

tr, tf

-

-

tcc

50

-

tcch

50

-

tcwh

250

-

(Note 33) tcdv

-

-

tcdz

-

100

tsu4

50

-

th4

50

-

tpcsl

250

-

tr

tf

Any Digital Output

90%

10%

90%

10%

Figure 1. Signal Rise and Fall Characteristics

CS61577

#3

-AX 5NITS

-

ns

-

ns

-

ns

-

ns

50

ns

-

ns

-

ns

-

ns

200

ns

-

ns

-

ns

-

ns

-

ns

RCLK

RPOS

RNEG

RDATA

BPV

RCLK

tpw1

tpwl1

t su1

tpwh1

t h1

EXTENDED

HARDWARE

MODE OR

HOST MODE

(CLKE = 1)

Figure 2. Recovered Clock and Data Switching Characteristics

HARDWARE

MODE OR

HOST MODE

(CLKE = 0)

6

$3DS15050F

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