registers. The value shown next to each state
transition in this figure is the value present at
J-TMS at each rising edge of J-TCK.
Test-Logic-Reset State
In this state, the test logic is disabled to continue
normal operation of the device. During initiali-
zation, the CS61582 initializes the instruction
register with the IDCODE instruction.
Regardless of the original state of the controller,
the controller enters the Test-Logic-Reset state
when the J-TMS input is held high for at least
five rising edges of J-TCK. The controller re-
mains in this state while J-TMS is high. The
CS61582 processor automatically enters this
state at power-up.
Run-Test/Idle State
This is a controller state between scan opera-
tions. Once in this state, the controller remains
in the state as long as J-TMS is held low. The
instruction register and all test data registers re-
tain their previous state. When J-TMS is high
and a rising edge is applied to J-TCK, the con-
troller moves to the Select-DR state.
Select-DR-Scan State
This is a temporary controller state. The test
data register selected by the current instruction
retains its previous state. If J-TMS is held low
and a rising edge is applied to J-TCK when in
this state, the controller moves into the Capture-
DR state and a scan sequence for the selected
test data register is initiated. If J-TMS is held
high and a rising edge applied to J-TCK, the
controller moves to the Select-IR-Scan state.
The instruction does not change in this state.
Capture-DR State
In this state, the Boundary Scan Register cap-
tures input pin data if the current instruction is
EXTEST or SAMPLE/PRELOAD. The other
test data registers, which do not have parallel in-
put, are not changed.
The instruction does not change in this state.
When the TAP controller is in this state and a
rising edge is applied to J-TCK, the controller
enters the Exit1-DR state if J-TMS is high or the
Shift-DR state if J-TMS is low.
1
Test-Logic-Reset
0
1
0
Run-Test/Idle
Select-DR-Scan 1
0
1
Capture-DR
0
Shift-DR
0
1
1
Exit1-DR
0
Pause-DR
0
1
0
Exit2-DR
1
Update-DR
1
0
Select-IR-Scan 1
0
1
Capture-IR
0
Shift-IR
0
1
1
Exit1-IR
0
Pause-IR
0
1
0
Exit2-IR
1
Update-IR
1
0
Figure 11. TAP Controller State Diagram
16
DS224PP1